Issued Patents All Time
Showing 25 most recent of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7759774 | Shielded structures to protect semiconductor devices | Brian S. Doyle | 2010-07-20 |
| 6998357 | High dielectric constant metal oxide gate dielectrics | Gang Bai, Brian S. Doyle, Peng Cheng, Chunlin Liang | 2006-02-14 |
| 6949831 | In-plane on-chip decoupling capacitors and method for making same | Chien Chiang | 2005-09-27 |
| 6949476 | Method of creating shielded structures to protect semiconductor devices | Brian S. Doyle | 2005-09-27 |
| 6790704 | Method for capacitively coupling electronic devices | Brian S. Doyle, Quat Vu | 2004-09-14 |
| 6777320 | In-plane on-chip decoupling capacitors and method for making same | Chien Chiang | 2004-08-17 |
| 6709885 | Method of fabricating image sensors using a thin film photodiode above active CMOS circuitry | Jack S. Uppal, Stephen Bradford Gospe, Kevin M. Connolly | 2004-03-23 |
| 6696369 | Method of creating shielded structures to protect semiconductor devices | Brian S. Doyle | 2004-02-24 |
| 6689702 | High dielectric constant metal oxide gate dielectrics | Gang Bai, Brian S. Doyle, Peng Cheng, Chunlin Liang | 2004-02-10 |
| 6528856 | High dielectric constant metal oxide gate dielectrics | Gang Bai, Brian S. Doyle, Peng Cheng, Chunlin Liang | 2003-03-04 |
| 6501065 | Image sensor using a thin film photodiode above active CMOS circuitry | Jack S. Uppal, Stephen Bradford Gospe, Kevin M. Connolly | 2002-12-31 |
| 6400015 | Method of creating shielded structures to protect semiconductor devices | Brian S. Doyle | 2002-06-04 |
| 6309956 | Fabricating low K dielectric interconnect systems by using dummy structures to enhance process | Chien Chiang, Anne S. Mack, Jin Lee, Sing-Mo Tzeng, Chuanbin Pan +3 more | 2001-10-30 |
| 6310400 | Apparatus for capacitively coupling electronic devices | Brian S. Doyle, Quat Vu | 2001-10-30 |
| 6303464 | Method and structure for reducing interconnect system capacitance through enclosed voids in a dielectric layer | Eng T. Gaw, Quat Vu, Chien Chiang, Ian A. Young, Thomas Marieb | 2001-10-16 |
| 6239019 | Interconnect structure using a combination of hard dielectric and polymer as interlayer dielectrics | Chien Chiang | 2001-05-29 |
| 6040628 | Interconnect structure using a combination of hard dielectric and polymer as interlayer dielectrics | Chien Chiang | 2000-03-21 |
| 6037249 | Method for forming air gaps for advanced interconnect systems | Chien Chiang, Vicky Ochoa, Chuanbin Pan, Sing-Mo Tzeng | 2000-03-14 |
| 6027995 | Method for fabricating an interconnect structure with hard mask and low dielectric constant materials | Chien Chiang, Chuanbin Pan, Vicky Ochoa, Sychyi Fang, Joyce C. Sum +2 more | 2000-02-22 |
| 5977634 | Diffusion barrier for electrical interconnects in an integrated circuit | Gang Bai | 1999-11-02 |
| 5886410 | Interconnect structure with hard mask and low dielectric constant materials | Chien Chiang, Chuanbin Pan, Vicky Ochoa, Sychyi Fang, Joyce C. Sum +2 more | 1999-03-23 |
| 5880030 | Unlanded via structure and method for making same | Sychyi Fang, Chien Chiang | 1999-03-09 |
| 5861340 | Method of forming a polycide film | Gang Bai | 1999-01-19 |
| 5858843 | Low temperature method of forming gate electrode and gate dielectric | Brian S. Doyle | 1999-01-12 |
| 5817572 | Method for forming multileves interconnections for semiconductor fabrication | Chien Chiang | 1998-10-06 |