Issued Patents All Time
Showing 25 most recent of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10514920 | Dynamically updating hardware prefetch trait to exclusive or shared at program detection | Rodney E. Hooker, John Michael Greer | 2019-12-24 |
| 9891916 | Dynamically updating hardware prefetch trait to exclusive or shared in multi-memory access agent system | Rodney E. Hooker, John Michael Greer, Meera Ramani-Augustin | 2018-02-13 |
| 9652400 | Fully associative cache memory budgeted by memory access type | Rodney E. Hooker, Douglas R. Reed, John Michael Greer, Colin Eddy | 2017-05-16 |
| 8543765 | Efficient data prefetching in the presence of load hits | Clinton Thomas Glover, Colin Eddy, Rodney E. Hooker | 2013-09-24 |
| 8489823 | Efficient data prefetching in the presence of load hits | Clinton Thomas Glover, Colin Eddy, Rodney E. Hooker | 2013-07-16 |
| 8364906 | Avoiding memory access latency by returning hit-modified when holding non-modified data | Rodney E. Hooker, Colin Eddy, Darius D. Gaskins | 2013-01-29 |
| 8234450 | Efficient data prefetching in the presence of load hits | Clinton Thomas Glover, Colin Eddy, Rodney E. Hooker | 2012-07-31 |
| 8051116 | Apparatus and method for generating packed sum of absolute differences | Daniel W. J. Johnson | 2011-11-01 |
| 7480685 | Apparatus and method for generating packed sum of absolute differences | Daniel W. J. Johnson | 2009-01-20 |
| 7376686 | Apparatus and method for generating packed sum of absolute differences | Daniel W. J. Johnson | 2008-05-20 |
| 7191320 | Apparatus and method for performing a detached load operation in a pipeline microprocessor | Rodney E. Hooker, Daniel W. J. Johnson | 2007-03-13 |
| 6412065 | Status register associated with MMX register file for tracking writes | — | 2002-06-25 |
| 6385716 | Method and apparatus for tracking coherence of dual floating point and MMX register files | G. Glenn Henry | 2002-05-07 |
| 6339823 | Method and apparatus for selective writing of incoherent MMX registers | — | 2002-01-15 |
| 6134573 | Apparatus and method for absolute floating point register addressing | G. Glenn Henry, Terry Parks | 2000-10-17 |
| 6061781 | Concurrent execution of divide microinstructions in floating point unit and overflow detection microinstructions in integer unit for integer divide | Dinesh K. Jain, Arturo Martin-de-Nicolas | 2000-05-09 |
| 6014736 | Apparatus and method for improved floating point exchange | Timothy A. Elliott, G. Glenn Henry | 2000-01-11 |
| 5913054 | Method and system for processing a multiple-register instruction that permit multiple data words to be written in a single processor cycle | Soummya Mallick, Rajesh B. Patel, Romesh Mangho Jessani | 1999-06-15 |
| 5898864 | Method and system for executing a context-altering instruction without performing a context-synchronization operation within high-performance processors | Robert T. Golla, James Allan Kahle, Soummya Mallick | 1999-04-27 |
| 5892699 | Method and apparatus for optimizing dependent operand flow within a multiplier using recoding logic | John L. Duncan | 1999-04-06 |
| 5870616 | System and method for reducing power consumption in an electronic circuit | Soummya Mallick | 1999-02-09 |
| 5867684 | Method and processor that permit concurrent execution of a store multiple instruction and a dependent instruction | James Allan Kahle, Soummya Mallick, Aubrey Deene Ogden | 1999-02-02 |
| 5850563 | Processor and method for out-of-order completion of floating-point operations during load/store multiple operations | Soummya Mallick | 1998-12-15 |
| 5822758 | Method and system for high performance dynamic and user programmable cache arbitration | Timothy A. Elliott, Christopher H. Olson, David Shippy | 1998-10-13 |
| 5805907 | System and method for reducing power consumption in an electronic circuit | Soummya Mallick | 1998-09-08 |