Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11860228 | Integrated circuit chip testing interface with reduced signal wires | Niravkumar Patel, Amitava Majumdar, Jane W. Sowards | 2024-01-02 |
| 11755804 | Hybrid synchronous and asynchronous control for scan-based testing | Rambabu Nerukonda, Niravkumar Patel, Amitava Majumdar | 2023-09-12 |
| 11500017 | Testing memory elements using an internal testing interface | Amitava Majumdar | 2022-11-15 |
| 11263377 | Circuit architecture for expanded design for testability functionality | Amitava Majumdar, Partho Tapan Chaudhuri, Niravkumar Patel | 2022-03-01 |
| 11054461 | Test circuits for testing a die stack | Nui Chong, Amitava Majumdar, Cheang-Whang Chang, Henley Liu, Myongseob Kim | 2021-07-06 |
| 8151012 | Virtual row buffers for use with random access memory | Changkyu Kim, Christopher J. Hughes, Anthony T. Nguyen, Yen-Kuang Chen, Zeshan A. Chishti +1 more | 2012-04-03 |