Issued Patents All Time
Showing 25 most recent of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9235530 | Method and system for binary cache cleanup | Steven T. Sprouse, Sergei Gorobets, Alan David Bennett, Ameen Aslam | 2016-01-12 |
| 9176864 | Non-volatile memory and method having block management with hot/cold data sorting | Sergey Anatolievich Gorobets, Alan David Bennett, Tom Hugh Shippey, Liam Michael Parker, Yauheni Yaromenka +2 more | 2015-11-03 |
| 9104327 | Fast translation indicator to reduce secondary address table checks in a memory device | Sergey Anatolievich Gorobets, Steven T. Sprouse | 2015-08-11 |
| 9070449 | Defective block management | Nian Niles Yang, Uday Chandrasekhar, Yichao Huang, Alexandra Bauche | 2015-06-30 |
| 9063862 | Expandable data cache | Sergey Anatolievich Gorobets, Steven T. Sprouse, Alan David Bennett | 2015-06-23 |
| 8848445 | System and method for minimizing write amplification while maintaining sequential performance using logical group striping in a multi-bank system | Steven T. Sprouse, Sergey Anatolievich Gorobets, Alan David Bennett, Marielle Bundukin | 2014-09-30 |
| 8700840 | Nonvolatile memory with write cache having flush/eviction methods | Alexander Paley, Sergey Anatolievich Gorobets, Eugene Zilberman, Alan David Bennett, Shai Traister +2 more | 2014-04-15 |
| 8626986 | Pre-emptive garbage collection of memory blocks | Shai Traister, Jianmin Huang, Neil David Hutchison, Steven T. Sprouse | 2014-01-07 |
| 8244960 | Non-volatile memory and method with write cache partition management methods | Alexander Paley, Sergey Anatolievich Gorobets, Eugene Zilberman, Alan David Bennett, Shai Traister +2 more | 2012-08-14 |
| 8094500 | Non-volatile memory and method with write cache partitioning | Alexander Paley, Sergey Anatolievich Gorobets, Eugene Zilberman, Alan David Bennett, Shai Traister +2 more | 2012-01-10 |
| RE40921 | Mechanism for efficiently processing deferred order-dependent memory access transactions in a pipelined system | Peter D. MacWilliams, Stephen S. Pawlowski, Muthurajan Jayakumar | 2009-09-22 |
| 7039750 | On-chip switch fabric | Jack Regula, Jhy-ping Shaw, Ronald A. Simmons, Curtis Winward, Ralph Woodard | 2006-05-02 |
| 6598103 | Transmission of signals synchronous to a common clock and transmission of data synchronous to strobes in a multiple agent processing system | Peter D. MacWilliams, Dilip K. Sampath, Bindi A. Prasad | 2003-07-22 |
| 6434692 | High-throughput interface between a system memory controller and a peripheral device | Norman J. Rasmussen | 2002-08-13 |
| 6336159 | Method and apparatus for transferring data in source-synchronous protocol and transferring signals in common clock protocol in multiple agent processing system | Peter D. MacWilliams, Dilip K. Sampath, Bindi A. Prasad | 2002-01-01 |
| 6266719 | High-throughput interface between a system memory controller and a peripheral device | Norman J. Rasmussen | 2001-07-24 |
| 6263397 | Mechanism for delivering interrupt messages | Mani Azimi, Stephen S. Pawlowski, Daniel G. Lau, M. Jayakumar | 2001-07-17 |
| 6167468 | High-throughput interface between a system memory controller and a peripheral device | Norman J. Rasmussen | 2000-12-26 |
| 6112016 | Method and apparatus for sharing a signal line between agents | Peter D. MacWilliams, Norman J. Rasmussen, Nicholas D. Wade | 2000-08-29 |
| 6047355 | Symmetric multiprocessing system with unified environment and distributed system functions | Norman J. Rasmussen, Suresh Marisetty, Puthiya K. Nizar | 2000-04-04 |
| 6035436 | Method and apparatus for fault on use data error handling | Len Schultz | 2000-03-07 |
| 6012118 | Method and apparatus for performing bus operations in a computer system using deferred replies returned without using the address bus | Muthurajan Jayakumar, Sunny C. Huang, Peter D. MacWilliams, Stephen S. Pawlowski, Bindi A. Prasad | 2000-01-04 |
| 6006291 | High-throughput interface between a system memory controller and a peripheral device | Norman J. Rasmussen | 1999-12-21 |
| 5964856 | Mechanism for data strobe pre-driving during master changeover on a parallel bus | Leonard Joshua Schultz, Dilip K. Sampath, Muthurajan Jayakumar, Bindi A. Prasad | 1999-10-12 |
| 5961621 | Mechanism for efficiently processing deferred order-dependent memory access transactions in a pipelined system | Peter D. MacWilliams, Stephen S. Pawlowski, Muthurajan Jayakumar | 1999-10-05 |