Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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William S. Wu — 33 Patents

Intel: 20 patents #2,048 of 30,777Top 7%
STSandisk Technologies: 10 patents #335 of 2,224Top 20%
PNPackard Bell Nec: 1 patents #49 of 93Top 55%
PTPlx Technology: 1 patents #11 of 46Top 25%
ZSZenith Data Systems: 1 patents #47 of 84Top 60%
Cupertino, CA: #472 of 6,989 inventorsTop 7%
California: #15,252 of 386,348 inventorsTop 4%
Overall (All Time): #105,480 of 4,157,543Top 3%
33 Patents All Time
William S. Wu has been granted 33 US patents while listed as an inventor at Intel. The first was granted in 1996 and the most recent in January 2016. William S. Wu ranks #105,480 of 4,157,543 US inventors in our database (top 2.5%). Patent records list William S. Wu in Cupertino, CA, US.

Issued Patents All Time

Showing 1–25 of 33 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9235530 Method and system for binary cache cleanup Steven T. Sprouse, Sergei Gorobets, Alan David Bennett, Ameen Aslam 2016-01-12 $10,625,000
9176864 Non-volatile memory and method having block management with hot/cold data sorting Sergey Anatolievich Gorobets, Alan David Bennett, Tom Hugh Shippey, Liam Michael Parker, Yauheni Yaromenka +2 more 2015-11-03 $9,442,000
9104327 Fast translation indicator to reduce secondary address table checks in a memory device Sergey Anatolievich Gorobets, Steven T. Sprouse 2015-08-11 $7,858,000
9070449 Defective block management Nian Niles Yang, Uday Chandrasekhar, Yichao Huang, Alexandra Bauche 2015-06-30 $9,701,000
9063862 Expandable data cache Sergey Anatolievich Gorobets, Steven T. Sprouse, Alan David Bennett 2015-06-23 $11,524,000
8848445 System and method for minimizing write amplification while maintaining sequential performance using logical group striping in a multi-bank system Steven T. Sprouse, Sergey Anatolievich Gorobets, Alan David Bennett, Marielle Bundukin 2014-09-30 $17,384,000
8700840 Nonvolatile memory with write cache having flush/eviction methods Alexander Paley, Sergey Anatolievich Gorobets, Eugene Zilberman, Alan David Bennett, Shai Traister +2 more 2014-04-15 $14,735,000
8626986 Pre-emptive garbage collection of memory blocks Shai Traister, Jianmin Huang, Neil David Hutchison, Steven T. Sprouse 2014-01-07 $18,855,000
8244960 Non-volatile memory and method with write cache partition management methods Alexander Paley, Sergey Anatolievich Gorobets, Eugene Zilberman, Alan David Bennett, Shai Traister +2 more 2012-08-14 $10,725,000
8094500 Non-volatile memory and method with write cache partitioning Alexander Paley, Sergey Anatolievich Gorobets, Eugene Zilberman, Alan David Bennett, Shai Traister +2 more 2012-01-10 $17,285,000
RE40921 Mechanism for efficiently processing deferred order-dependent memory access transactions in a pipelined system Peter D. MacWilliams, Stephen S. Pawlowski, Muthurajan Jayakumar 2009-09-22
7039750 On-chip switch fabric Jack Regula, Jhy-ping Shaw, Ronald A. Simmons, Curtis Winward, Ralph Woodard 2006-05-02 $4,429,000
6598103 Transmission of signals synchronous to a common clock and transmission of data synchronous to strobes in a multiple agent processing system Peter D. MacWilliams, Dilip K. Sampath, Bindi A. Prasad 2003-07-22 $27,595,000
6434692 High-throughput interface between a system memory controller and a peripheral device Norman J. Rasmussen 2002-08-13 $41,871,000
6336159 Method and apparatus for transferring data in source-synchronous protocol and transferring signals in common clock protocol in multiple agent processing system Peter D. MacWilliams, Dilip K. Sampath, Bindi A. Prasad 2002-01-01
6266719 High-throughput interface between a system memory controller and a peripheral device Norman J. Rasmussen 2001-07-24 $166,417,000
6263397 Mechanism for delivering interrupt messages Mani Azimi, Stephen S. Pawlowski, Daniel G. Lau, M. Jayakumar 2001-07-17 $231,481,000
6167468 High-throughput interface between a system memory controller and a peripheral device Norman J. Rasmussen 2000-12-26 $173,686,000
6112016 Method and apparatus for sharing a signal line between agents Peter D. MacWilliams, Norman J. Rasmussen, Nicholas D. Wade 2000-08-29 $206,201,000
6047355 Symmetric multiprocessing system with unified environment and distributed system functions Norman J. Rasmussen, Suresh Marisetty, Puthiya K. Nizar 2000-04-04 $215,158,000
6035436 Method and apparatus for fault on use data error handling Len Schultz 2000-03-07 $430,213,000
6012118 Method and apparatus for performing bus operations in a computer system using deferred replies returned without using the address bus Muthurajan Jayakumar, Sunny C. Huang, Peter D. MacWilliams, Stephen S. Pawlowski, Bindi A. Prasad 2000-01-04 $201,443,000
6006291 High-throughput interface between a system memory controller and a peripheral device Norman J. Rasmussen 1999-12-21 $283,710,000
5964856 Mechanism for data strobe pre-driving during master changeover on a parallel bus Leonard Joshua Schultz, Dilip K. Sampath, Muthurajan Jayakumar, Bindi A. Prasad 1999-10-12 $143,616,000
5961621 Mechanism for efficiently processing deferred order-dependent memory access transactions in a pipelined system Peter D. MacWilliams, Stephen S. Pawlowski, Muthurajan Jayakumar 1999-10-05 $132,199,000