PN

Puthiya K. Nizar

IN Intel: 17 patents #2,418 of 30,777Top 8%
PN Packard Bell Nec: 1 patents #49 of 93Top 55%
ZS Zenith Data Systems: 1 patents #47 of 84Top 60%
Overall (All Time): #242,019 of 4,157,543Top 6%
19
Patents All Time

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #TitleCo-InventorsDate
6889284 Method and apparatus for supporting SDRAM memory Khong Seng Foo 2005-05-03
6636957 Method and apparatus for configuring and initializing a memory device and a memory channel William A. Stevens 2003-10-21
6532526 Method and apparatus for configuring a memory device and a memory channel using configuration space registers William A. Stevens 2003-03-11
6516396 Means to extend tTR range of RDRAMS via the RDRAM memory controller Andrew M. Volk 2003-02-04
6470238 Method and apparatus to control device temperature David J. McDonnell, Brian K. Langendorf, Michael G. LaTondre, Jeff Rabe, Tom A. Sutera +2 more 2002-10-22
6467013 Memory transceiver to couple an additional memory channel to an existing memory channel 2002-10-15
6442698 Method and apparatus for power management in a memory subsystem 2002-08-27
6378056 Method and apparatus for configuring a memory device and a memory channel using configuration space registers William A. Stevens 2002-04-23
6252821 Method and apparatus for memory address decode in memory subsystems supporting a large number of memory devices Michael W. Williams 2001-06-26
6230274 Method and apparatus for restoring a memory device channel when exiting a low power state William A. Stevens 2001-05-08
6226729 Method and apparatus for configuring and initializing a memory device and a memory channel William A. Stevens 2001-05-01
6212611 Method and apparatus for providing a pipelined memory controller Michael W. Williams 2001-04-03
6047355 Symmetric multiprocessing system with unified environment and distributed system functions William S. Wu, Norman J. Rasmussen, Suresh Marisetty 2000-04-04
5909556 M&A for exchanging date, status and commands over an hierarchical serial bus assembly using communication packets Jeff C. Morriss, Shaun Knoll, Richard M. Haslam, Ajay V. Bhatt, Sudarshan B. Cadambi 1999-06-01
5809340 Adaptively generating timing signals for access to various memory devices based on stored profiles James F. Bertone, Bruno DiPlacido, Thomas F. Joyce, Martin Massucci, Lance J. McNally +10 more 1998-09-15
5742847 M&A for dynamically generating and maintaining frame based polling schedules for polling isochronous and asynchronous functions that guaranty latencies and bandwidths to the isochronous functions Shaun Knoll, Jeff C. Morriss, Ajay V. Bhatt, Richard M. Haslam, Sudarshan B. Cadambi 1998-04-21
5694555 Method and apparatus for exchanging data, status, and commands over an hierarchical serial bus assembly using communication packets Jeff C. Morriss, Shaun Knoll, Richard M. Haslam, Ajay V. Bhatt, Sudarshan B. Cadambi 1997-12-02
5615404 System having independently addressable bus interfaces coupled to serially connected multi-ported signal distributors generating and maintaining frame based polling schedule favoring isochronous peripherals Shaun Knoll, Jeff C. Morriss, Shelagh Callahan, Ajay V. Bhatt, Richard M. Haslam +2 more 1997-03-25
5522069 Symmetric multiprocessing system with unified environment and distributed system functions James F. Bertone, Bruno DiPlacido, Thomas F. Joyce, Martin Massucci, Lance J. McNally +10 more 1996-05-28