Issued Patents All Time
Showing 101–125 of 150 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10249742 | Offstate parasitic leakage reduction for tunneling field effect transistors | Van H. Le, Gilbert Dewey, Benjamin Chu-Kung, Ashish Agrawal, Matthew V. Metz +8 more | 2019-04-02 |
| 10243069 | Gallium nitride transistor having a source/drain structure including a single-crystal portion abutting a 2D electron gas | Han Wui Then, Sansaptak Dasgupta, Marko Radosavljevic, Sanaz K. Gardner, Robert S. Chau | 2019-03-26 |
| 10229991 | III-N epitaxial device structures on free standing silicon mesas | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Marko Radosavljevic, Benjamin Chu-Kung +1 more | 2019-03-12 |
| 10217673 | Integrated circuit die having reduced defect group III-nitride structures and methods associated therewith | Sansaptak Dasgupta, Han Wui Then, Marko Radosavljevic, Sanaz K. Gardner, Robert S. Chau +1 more | 2019-02-26 |
| 10211327 | Semiconductor devices with raised doped crystalline structures | Marko Radosavljevic, Sansaptak Dasgupta, Sanaz K. Gardner, Han Wui Then, Robert S. Chau | 2019-02-19 |
| 10204989 | Method of fabricating semiconductor structures on dissimilar substrates | Benjamin Chu-Kung, Sherry R. Taft, Van H. Le, Sansaptak Dasgupta, Sanaz K. Gardner +3 more | 2019-02-12 |
| 10121861 | Nanowire transistor fabrication with hardmask layers | Seiyon Kim, Kelin J. Kuhn, Willy Rachmady, Jack T. Kavalieros | 2018-11-06 |
| 10096683 | Group III-N transistor on nanoscale template structures | Han Wui Then, Sansaptak Dasgupta, Marko Radosavljevic, Benjamin Chu-Kung, Sanaz K. Gardner +1 more | 2018-10-09 |
| 10096682 | III-N devices in Si trenches | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Marko Radosavljevic, Benjamin Chu-Kung +3 more | 2018-10-09 |
| 10096474 | Methods and structures to prevent sidewall defects during selective epitaxy | Niloy Mukherjee, Niti Goel, Sanaz K. Gardner, Pragyansri Pathi, Matthew V. Metz +6 more | 2018-10-09 |
| 10056456 | N-channel gallium nitride transistors | Han Wui Then, Sansaptak Dasgupta, Marko Radosavljevic, Sanaz K. Gardner, Robert S. Chau | 2018-08-21 |
| 10038054 | Variable gate width for gate all-around transistors | Willy Rachmady, Van H. Le, Ravi Pillarisetty, Jack T. Kavalieros, Robert S. Chau | 2018-07-31 |
| 10032911 | Wide band gap transistor on non-native semiconductor substrate | Han Wui Then, Robert S. Chau, Sansaptak Dasgupta, Marko Radosavljevic, Benjamin Chu-Kung +2 more | 2018-07-24 |
| 10026845 | Deep gate-all-around semiconductor device having germanium or group III-V active layer | Ravi Pillarisetty, Willy Rachmady, Van H. Le, Jessica S. Kachian, Jack T. Kavalieros +5 more | 2018-07-17 |
| 9923087 | Self-aligned structures and methods for asymmetric GaN transistors and enhancement mode operation | Sansaptak Dasgupta, Han Wui Then, Marko Radosavljevic, Niloy Mukherjee, Niti Goel +3 more | 2018-03-20 |
| 9922826 | Integrated circuit die having reduced defect group III-nitride layer and methods associated therewith | Sansaptak Dasgupta, Han Wui Then, Marko Radosavljevic, Robert S. Chau, Sanaz K. Gardner | 2018-03-20 |
| 9847432 | Forming III-V device structures on (111) planes of silicon fins | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Benjamin Chu-Kung, Marko Radosavljevic +1 more | 2017-12-19 |
| 9837499 | Self-aligned gate last III-N transistors | Han Wui Then, Sansaptak Dasgupta, Sanaz K. Gardner, Marko RADOSAVLIJEVIC, Robert S. Chau | 2017-12-05 |
| 9806203 | Nonplanar III-N transistors with compositionally graded semiconductor channels | Han Wui Then, Sansaptak Dasgupta, Marko Radosavljevic, Benjamin Chu-Kung, Sanaz K. Gardner +1 more | 2017-10-31 |
| 9716149 | Group III-N transistors on nanoscale template structures | Han Wui Then, Sansaptak Dasgupta, Marko Radosavljevic, Benjamin Chu-Kung, Sanaz K. Gardner +1 more | 2017-07-25 |
| 9698222 | Method of fabricating semiconductor structures on dissimilar substrates | Benjamin Chu-Kung, Sherry R. Taft, Van H. Le, Sansaptak Dasgupta, Sanaz K. Gardner +3 more | 2017-07-04 |
| 9698013 | Methods and structures to prevent sidewall defects during selective epitaxy | Niloy Mukherjee, Niti Goel, Sanaz K. Gardner, Pragyansri Pathi, Matthew V. Metz +6 more | 2017-07-04 |
| 9673045 | Integration of III-V devices on Si wafers | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Marko Radosavljevic, Benjamin Chu-Kung +1 more | 2017-06-06 |
| 9666583 | Methods of containing defects for non-silicon device engineering | Niti Goel, Ravi Pillarisetty, Niloy Mukherjee, Robert S. Chau, Willy Rachmady +6 more | 2017-05-30 |
| 9666708 | III-N transistors with enhanced breakdown voltage | Han Wui Then, Benjamin Chu-Kung, Sansaptak Dasgupta, Robert S. Chau, Ravi Pillarisetty +1 more | 2017-05-30 |