Issued Patents All Time
Showing 26–50 of 76 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9024683 | Method and apparatus for reducing power spikes caused by clock networks | David Lewis | 2015-05-05 |
| 8949763 | Apparatus and methods for optimization of integrated circuits | — | 2015-02-03 |
| 8930597 | Method and apparatus for supporting low-latency external memory interfaces for integrated circuits | Christine Joanpui Lau, Kalen B. Brunham | 2015-01-06 |
| 8929162 | Gating and sampling a data strobe signal using a shared enable signal | Joshua David Fender, Gordon Raymond Chiu | 2015-01-06 |
| 8930175 | Method and apparatus for performing timing analysis that accounts for rise/fall skew | — | 2015-01-06 |
| 8904331 | Method and apparatus for performing time domain jitter modeling | — | 2014-12-02 |
| 8898609 | Method and apparatus for integrating signal transition time modeling during routing | Vadim Gouterman | 2014-11-25 |
| 8863059 | Integrated circuit device configuration methods adapted to account for retiming | David Lewis, Valavan Manohararajah | 2014-10-14 |
| 8856713 | Method and apparatus for performing efficient incremental compilation | Ketan Padalia | 2014-10-07 |
| 8832627 | Automatic asynchronous signal pipelining | Mark Bourgeault, David Lewis | 2014-09-09 |
| 8775701 | Method and apparatus for source-synchronous capture using a first-in-first-out unit | — | 2014-07-08 |
| 8732639 | Method and apparatus for protecting, optimizing, and reporting synchronizers | Vaughn Betz, David Neto | 2014-05-20 |
| 8677298 | Programmable device configuration methods adapted to account for retiming | Valavan Manohararajah, David Lewis, David Galloway | 2014-03-18 |
| 8588014 | Methods for memory interface calibration | Valavan Manohararajah | 2013-11-19 |
| 8572530 | Method and apparatus for performing path-level skew optimization and analysis for a logic design | Vaughn Betz, David Karchmer | 2013-10-29 |
| 8565033 | Methods for calibrating memory interface circuitry | Valavan Manohararajah, Ivan Blunno, Navid Azizi | 2013-10-22 |
| 8558599 | Method and apparatus for reducing power spikes caused by clock networks | David Lewis | 2013-10-15 |
| 8539414 | Automatic asynchronous signal pipelining | Mark Bourgeault, David Lewis | 2013-09-17 |
| 8539418 | Method and apparatus for performing efficient incremental compilation | Ketan Padalia | 2013-09-17 |
| 8508254 | Apparatus for using metastability-hardened storage circuits in logic devices and associated methods | David Lewis, Jeffrey Christopher Chromczak | 2013-08-13 |
| 8499273 | Systems and methods for optimizing placement and routing | Kimberley Anne Bozman, Vaughn Betz, David Neto, Ketan Padalia | 2013-07-30 |
| 8402416 | Method and apparatus for composing and decomposing low-skew networks | David Galloway | 2013-03-19 |
| 8281274 | Method and apparatus for performing efficient incremental compilation | Ketan Padalia | 2012-10-02 |
| 8261218 | Systems and methods for determining beneficial clock-path connection delays | — | 2012-09-04 |
| 8255860 | Exploiting independent portions of logic designs for timing optimization | — | 2012-08-28 |