Issued Patents All Time
Showing 51–75 of 76 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8248110 | Clock switch-over circuits and methods | Gary Lai, Andy L. Lee, Vaughn Betz, Marcel A. LeBlanc | 2012-08-21 |
| 8232826 | Techniques for multiplexing delayed signals | Andy T. Nguyen, Ling Yu | 2012-07-31 |
| 8185714 | Method and apparatus for strobe-based source-synchronous capture using a first-in-first-out unit | — | 2012-05-22 |
| 8156463 | Method and apparatus for utilizing long-path and short-path timing constraints in an electronic-design-automation tool for routing | Vaughn Betz, William Weiyeh Chow | 2012-04-10 |
| 8046729 | Method and apparatus for composing and decomposing low-skew networks | David Galloway | 2011-10-25 |
| 8015382 | Method and apparatus for strobe-based source-synchronous capture using a first-in-first-out unit | — | 2011-09-06 |
| 7977975 | Apparatus for using metastability-hardened storage circuits in logic devices and associated methods | David Lewis, Jeffrey Christopher Chromczak | 2011-07-12 |
| 7958466 | Method and apparatus for calculating a scalar quality metric for quantifying the quality of a design solution | — | 2011-06-07 |
| 7911240 | Clock switch-over circuits and methods | Gary Lai, Andy L. Lee, Vaughn Betz, Marcel A. LeBlanc | 2011-03-22 |
| 7853911 | Method and apparatus for performing path-level skew optimization and analysis for a logic design | Vaughn Betz, David Karchmer | 2010-12-14 |
| 7788614 | Method and apparatus for performing analytic placement techniques on logic devices with restrictive areas | David Galloway | 2010-08-31 |
| 7737751 | Periphery clock distribution network for a programmable logic device | Gary Lai, Andy L. Lee, Vaughn Betz | 2010-06-15 |
| 7725853 | Optimizing long-path and short-path timing and accounting for manufacturing and operating condition variability | Vaughn Betz | 2010-05-25 |
| 7712067 | Method and apparatus for facilitating effective and efficient optimization of short-path timing constraints | Michael Chan | 2010-05-04 |
| 7694256 | Method and apparatus for performing analytic placement techniques on logic devices with restrictive areas | David Galloway | 2010-04-06 |
| 7676768 | Automatic asynchronous signal pipelining | Mark Bourgeault, David Lewis | 2010-03-09 |
| 7659764 | Efficient delay elements | Vaughn Betz | 2010-02-09 |
| 7629825 | Efficient delay elements | Vaughn Betz | 2009-12-08 |
| 7370291 | Method for mapping logic design memory into physical memory devices of a programmable logic device | Ketan Padalia | 2008-05-06 |
| 7308664 | Method and apparatus for utilizing long-path and short-path timing constraints in an electronic-design-automation tool for routing | Vaughn Betz, William Weiyeh Chow | 2007-12-11 |
| 7290232 | Optimizing long-path and short-path timing and accounting for manufacturing and operating condition variability | Vaughn Betz | 2007-10-30 |
| 7257795 | Method and apparatus for facilitating effective and efficient optimization of short-path timing constraints | Michael Chan | 2007-08-14 |
| 7254789 | Optimizing long-path and short-path timing and accounting for manufacturing and operating condition variability | Vaughn Betz | 2007-08-07 |
| 7207020 | Method and apparatus for utilizing long-path and short-path timing constraints in an electronic-design-automation tool | Vaughn Betz, William Weiyeh Chow | 2007-04-17 |
| 7138844 | Variable delay circuitry | Andy L. Lee, Gary Lai, Changsong Zhang, Vaughn Betz | 2006-11-21 |