Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424563 | Disaggregated entropy services for microelectronic assemblies | David Johnston, Georgios Dogiamis | 2025-09-23 |
| 11990419 | Physically unclonable function circuitry of a package substrate and method of providing same | Georgios Dogiamis, Feras Eid, Adel A. Elsherbini, David Johnston, Jyothi Bhaskarr Velamala | 2024-05-21 |
| 11720672 | Method, system and apparatus for error correction coding embedded in physically unclonable function arrays | Kuan-Yueh Shen, David Johnston, Javier Dacuna Santos | 2023-08-08 |
| 11321459 | Method, system and apparatus for error correction coding embedded in physically unclonable function arrays | Kuan-Yueh Shen, David Johnston, Javier Dacuna Santos | 2022-05-03 |
| 11290289 | Supply voltage and temperature insensitive physically unclonable function circuit | Kuan-Yueh Shen | 2022-03-29 |
| 10886417 | Device, system, and method to change a consistency of behavior by a cell circuit | Kuan-Yueh Shen, Stephen M. Ramey | 2021-01-05 |
| 10656916 | Random number generator including entropy source | Calvin Chiem | 2020-05-19 |
| 10168994 | Random number generator including entropy source | Calvin Chiem | 2019-01-01 |
| 9391617 | Hardware-embedded key based on random variations of a stress-hardened inegrated circuit | Sanu K. Mathew, Ram Krishnamurthy | 2016-07-12 |
| 9264048 | Secret operations using reconfigurable logics | — | 2016-02-16 |
| 7813507 | Method and system for creating random cryptographic keys in hardware | Ernie Brickell | 2010-10-12 |
| 7231552 | Method and apparatus for independent control of devices under test connected in parallel | Gregory M. Iovino | 2007-06-12 |
| 7221210 | Fuse sense circuit | Martin S. Denham | 2007-05-22 |
| 7208994 | Fuse sense circuit | Martin S. Denham | 2007-04-24 |
| 7183836 | Fuse sense circuit | Martin S. Denham | 2007-02-27 |
| 7157950 | Method and apparatus to construct a fifty percent (50%) duty cycle clock signal across power domains | Hon-Mo Law | 2007-01-02 |
| 7049865 | Power-on detect circuit for use with multiple voltage domains | Mark L. Neidengard, Patrick J. Ott, Gregory F. Taylor | 2006-05-23 |
| 7038508 | Methods and apparatuses for detecting clock loss in a phase-locked loop | Hon-Mo Law, Timothy D. Low | 2006-05-02 |
| 6937075 | Method and apparatus for reducing lock time in dual charge-pump phase-locked loops | Chee How Lim, Keng L. Wong | 2005-08-30 |
| 6906557 | Fuse sense circuit | Martin S. Denham | 2005-06-14 |
| 6903598 | Static, low-voltage fuse-based cell with high-voltage programming | Martin S. Denham, Mohsen Alavi, Kaizad Mistry, Patrick J. Ott, Paul Gregory Slankard +1 more | 2005-06-07 |
| 6874083 | Method and apparatus to ensure proper voltage and frequency configuration signals are defined before applying power to processor | Ananda Sarangi, Edward P. Osburn, Gregory F. Taylor | 2005-03-29 |
| 6469533 | Measuring a characteristic of an integrated circuit | Nasser A. Kurd, Keng L. Wong, Hung-Piao Ma | 2002-10-22 |