Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9237000 | Transceiver clock architecture with transmit PLL and receive slave delay lines | Aaron Martin, Ying Zhou, Joe Salmon, Derek M. Conrow | 2016-01-12 |
| 7668524 | Clock deskewing method, apparatus, and system | Mamun Ur Rashid, Aaron Martin | 2010-02-23 |
| 7439788 | Receive clock deskewing method, apparatus, and system | Mamun Ur Rashid, Aaron Martin | 2008-10-21 |
| 7157950 | Method and apparatus to construct a fifty percent (50%) duty cycle clock signal across power domains | Rachael Parker | 2007-01-02 |
| 7038508 | Methods and apparatuses for detecting clock loss in a phase-locked loop | Rachael Parker, Timothy D. Low | 2006-05-02 |