JS

Joseph M. Steigerwald

IN Intel: 34 patents #1,045 of 30,777Top 4%
SO Sony: 2 patents #12,963 of 25,231Top 55%
RI Rensselaer Polytechnic Institute: 1 patents #306 of 819Top 40%
📍 Forest Grove, OR: #6 of 174 inventorsTop 4%
🗺 Oregon: #1,029 of 28,073 inventorsTop 4%
Overall (All Time): #88,193 of 4,157,543Top 3%
37
Patents All Time

Issued Patents All Time

Showing 26–37 of 37 patents

Patent #TitleCo-InventorsDate
9508821 Self-aligned contacts Mark Bohr, Tahir Ghani, Nadia M. Rahhal-Orabi, Subhash M. Joshi, Jason W. Klaus +2 more 2016-11-29
9466565 Self-aligned contacts Mark Bohr, Tahir Ghani, Nadia M. Rahhai-Orabi, Subhash M. Joshi, Jason W. Klaus +2 more 2016-10-11
9219155 Multi-threshold voltage devices and associated techniques and configurations Tahir Ghani, Jenny Hu, Ian R. Post 2015-12-22
9093513 Self-aligned contacts Mark Bohr, Tahir Ghani, Nadia M. Rahhal-Orabi, Subhash M. Joshi, Jason W. Klaus +2 more 2015-07-28
9054178 Self-aligned contacts Mark Bohr, Tahir Ghani, Nadia M. Rahhai-Orabi, Subhash M. Joshi, Jason W. Klaus +2 more 2015-06-09
9041146 Logic chip including embedded magnetic tunnel junctions Kevin J. Lee, Tahir Ghani, John H. Epple, Yih Wang 2015-05-26
8441097 Methods to form memory devices having a capacitor with a recessed electrode Nick Lindert, Steven J. Keating, Christopher J. Jezewski, Timothy E. Glassman 2013-05-14
8436404 Self-aligned contacts Mark Bohr, Tahir Ghani, Nadia M. Rahhal-Orabi, Subhash M. Joshi, Jason W. Klaus +2 more 2013-05-07
8334184 Polish to remove topography in sacrificial gate layer prior to gate patterning Uday Shah, Seiichi Morimoto, Nancy Zelick 2012-12-18
7052996 Electrochemically polishing conductive films on semiconductor wafers 2006-05-30
6103625 Use of a polish stop layer in the formation of metal structures Gerald Marcyk 2000-08-15
5637185 Systems for performing chemical mechanical planarization and process for conducting same Shyam P. Murarka, Ronald J. Gutmann, David J. Duquette 1997-06-10