Issued Patents All Time
Showing 26–50 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7315920 | Circuit and method for protecting vector tags in high performance microprocessors | Nhon Quach, Greg Mathews, Edward T. Grochowski, Chakravarthy Kosaraju | 2008-01-01 |
| 7010671 | Computer system and method for executing interrupt instructions in two operating modes | Donald B. Alpert | 2006-03-07 |
| 6904502 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Nhon Quach, Greg Mathews, Edward T. Grochowski, Chakravarthy Kosaraju | 2005-06-07 |
| 6839814 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Nhon Quach, Greg Mathews, Edward T. Grochowski, Chakravarthy Kosaraju | 2005-01-04 |
| 6826588 | Method and apparatus for a fast comparison in redundant form arithmetic | Bharat Bhushan, Edward T. Grochowski, Vinod Sharma | 2004-11-30 |
| 6813628 | Method and apparatus for performing equality comparison in redundant form arithmetic | Bharat Bhushan, Edward T. Grochowski, Vinod Sharma | 2004-11-02 |
| 6775746 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Nhon Quach, Greg Mathews, Edward T. Grochowski, Chakravarthy Kosaraju | 2004-08-10 |
| 6763368 | Method and apparatus for performing single-cycle addition or subtraction and comparison in redundant form arithmetic | Bharat Bhushan, Vinod Sharma, Edward T. Grochowski | 2004-07-13 |
| 6754689 | Method and apparatus for performing subtraction in redundant form arithmetic | Bharat Bhushan, Edward T. Grochowski | 2004-06-22 |
| 6689989 | Heater for electric blanket | Harold W. Irwin, Sr., Kin Sang Cheng | 2004-02-10 |
| 6675266 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Nhon Quach, Greg Mathews, Edward T. Grochowski, Chakravarthy Kosaraju | 2004-01-06 |
| 6654909 | Apparatus and method for protecting critical resources against soft errors in high performance microprocessors | Nhon Quach, Chakravarthy Kosaraju, Venkatesh Nagapudi | 2003-11-25 |
| 6604184 | Virtual memory mapping using region-based page tables | Achmed R. Zahir, Gary N. Hammond | 2003-08-05 |
| 6542966 | Method and apparatus for managing temporal and non-temporal data in a single cache structure | Gautam Doshi, Stuart E. Sailer, John Fu, Gregory S. Mathews | 2003-04-01 |
| 6385718 | Computer system and method for executing interrupt instructions in operating modes | Donald B. Alpert | 2002-05-07 |
| 6163764 | Emulation of an instruction set on an instruction set architecture transition | Carole Dulong | 2000-12-19 |
| 5948099 | Apparatus and method for swapping the byte order of a data item to effectuate memory format conversion | Mustafiz R. Choudhury | 1999-09-07 |
| 5809314 | Method of monitoring system bus traffic by a CPU operating with reduced power | Douglas M. Carmean | 1998-09-15 |
| 5669003 | Method of monitoring system bus traffic by a CPU operating with reduced power | Douglas M. Carmean | 1997-09-16 |
| 5530932 | Cache coherent multiprocessing computer system with reduced power operating features | Douglas M. Carmean | 1996-06-25 |
| 5321836 | Virtual memory management method and apparatus utilizing separate and independent segmentation and paging mechanism | Paul S. Ries | 1994-06-14 |
| 5255378 | Method of transferring burst data in a microprocessor | Edward T. Grochowski | 1993-10-19 |
| 5210845 | Controller for two-way set associative cache | Sundaravarathan R. Iyengar, James Nadir | 1993-05-11 |
| 5201043 | System using both a supervisor level control bit and a user level control bit to enable/disable memory reference alignment checking | Ashish B. Dixit | 1993-04-06 |
| 5173872 | Content addressable memory for microprocessor system | Paul S. Ries | 1992-12-22 |