Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
CL

Christopher F. Lane

INIntel: 80 patents #310 of 30,777Top 2%
San Jose, CA: #395 of 32,062 inventorsTop 2%
California: #3,334 of 386,348 inventorsTop 1%
Overall (All Time): #22,261 of 4,157,543Top 1%
81 Patents All Time

Issued Patents All Time

Showing 26–50 of 81 patents

Patent #TitleCo-InventorsDate
7295036 Method and system for reducing static leakage current in programmable logic devices Ketan Zaveri 2007-11-13
7287189 I/O configuration and reconfiguration trigger through testing interface Brian Johnson, Keith Duwel, Mario Guzman, Andy L. Lee 2007-10-23
7262634 Methods of reducing power in programmable logic devices using low voltage swing for routing signals Vikram Santurkar 2007-08-28
7218133 Versatile logic element and logic array block David Lewis, Paul Leventis, Andy L. Lee, Henry Kim, Bruce B. Pedersen +4 more 2007-05-15
7161381 Multiple size memories in a programmable logic device Srinivas T. Reddy, David Jefferson, Vikram Santurkar, Richard G. Cliff 2007-01-09
6970014 Routing architecture for a programmable logic device David Lewis, Paul Leventis, Andy L. Lee, Brian Johnson, Richard G. Cliff +5 more 2005-11-29
6965249 Programmable logic device with redundant circuitry Ketan Zaveri, Hyun Yi, Giles V. Powell, Paul Leventis, David Jefferson +7 more 2005-11-15
6937064 Versatile logic element and logic array block David Lewis, Paul Leventis, Andy L. Lee, Henry Kim, Bruce B. Pedersen +4 more 2005-08-30
6897678 Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits Ketan Zaveri, Srinivas T. Reddy, Andy L. Lee, Cameron McClintock, Bruce B. Pedersen 2005-05-24
6895570 System and method for optimizing routing lines in a programmable logic device David Lewis, Vaughn Betz, Paul Leventis, Michael Chan, Cameron McClintock +3 more 2005-05-17
6879183 Programmable logic device architectures with super-regions having logic regions and a memory region David Jefferson, Cameron McClintock, James Schleicher, Andy L. Lee, Manuel Mejia +3 more 2005-04-12
6842039 Configuration shift register Mario Guzman, Andy L. Lee, Ninh D. Ngo 2005-01-11
6819135 Fast signal conductor networks for programmable logic devices Srinivas T. Reddy 2004-11-16
6815981 Programmable logic array integrated circuit devices Richard G. Cliff, Srinivas T. Reddy, David Jefferson, Rina Raman, L. Todd Cope +7 more 2004-11-09
6798242 Programmable logic device with hierarchical interconnection resources Srinivas T. Reddy, Richard G. Cliff, Ketan Zaveri, Manuel Mejia, David Jefferson +2 more 2004-09-28
6720796 Multiple size memories in a programmable logic device Srinivas T. Reddy, David Jefferson, Vikram Santurkar, Richard G. Cliff 2004-04-13
6670825 Efficient arrangement of interconnection resources on programmable logic devices Giles V. Powell, Wayne Yeung, Chiakang Sung, Bruce B. Pedersen 2003-12-30
6630842 Routing architecture for a programmable logic device David Lewis, Paul Leventis, Andy L. Lee, Brian Johnson, Richard G. Cliff +5 more 2003-10-07
6577160 Programmable logic device with hierarchical interconnection resources Srinivas T. Reddy, Richard G. Cliff, Ketan Zaveri, Manuel Mejia, David Jefferson +2 more 2003-06-10
6507216 Efficient arrangement of interconnection resources on programmable logic devices Giles V. Powell, Wayne Yeung, Chiakang Sung, Bruce B. Pedersen 2003-01-14
6481000 Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits Ketan Zaveri, Srinivas T. Reddy, Andy L. Lee, Cameron McClintock, Bruce B. Pedersen 2002-11-12
6480028 Programmable logic device architectures with super-regions having logic regions and memory region David Jefferson, Cameron McClintock, James Schleicher, Andy L. Lee, Manuel Mejia +3 more 2002-11-12
6462577 Configurable memory structures in a programmable logic device Andy L. Lee, Srinivas T. Reddy, Brian Johnson, Ketan Zaveri, Mario Guzman +1 more 2002-10-08
6417694 Programmable logic device with hierarchical interconnection resources Srinivas T. Reddy, Richard G. Cliff, Ketan Zaveri, Manuel Mejia, David Jefferson +2 more 2002-07-09
6392954 Dual port programmable logic device variable depth and width memory array Srinivas T. Reddy, Manuel Mejia, Richard G. Cliff, Kerry Veenstra 2002-05-21