Issued Patents All Time
Showing 51–72 of 72 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9760409 | Dynamically modifying a power/performance tradeoff based on a processor utilization | Krishnakanth V. Sistla, Mark Rowland, Ian M. Steiner, Matthew Bace, Daniel Borkowski +3 more | 2017-09-12 |
| 9606595 | Microprocessor-assisted auto-calibration of voltage regulators | Jeremy J. Shrall, Krishnakanth V. Sistla, Avinash N. Ananthakrishnan, Vivek Garg, Christopher Allan Poirier +2 more | 2017-03-28 |
| 9557804 | Dynamic power limit sharing in a platform | Krishnakanth V. Sistla, Cesar A. Quiroz, Vivek Garg, Martin T. Rowland, Inder M. Sodhi +1 more | 2017-01-31 |
| 9547027 | Dynamically measuring power consumption in a processor | Krishnakanth V. Sistla, Martin T. Rowland, Vivek Garg, James S. Burns | 2017-01-17 |
| 9535487 | User level control of power management policies | Krishnakanth V. Sistla, Jeremy J. Shrall, Stephen H. Gunther, Efraim Rotem, Alon Naveh +7 more | 2017-01-03 |
| 9513688 | Measurement of performance scalability in a microprocessor | Krishnakanth V. Sistla, Jeremy J. Shrall, Avinash N. Ananthakrishnan | 2016-12-06 |
| 9494996 | Processor having frequency of operation information for guaranteed operation under high temperature events | Robin A. Steinbrecher, Susan F. Smith, Sandeep Ahuja, Vivek Garg, Tessil Thomas +3 more | 2016-11-15 |
| 9495001 | Forcing core low power states in a processor | Krishnakanth V. Sistla, Allen W. Chu, Ian M. Steiner | 2016-11-15 |
| 9417681 | Mechanism to provide workload and configuration-aware deterministic performance for microprocessors | Krishnakanth V. Sistla, Martin T. Rowland, Chris Poirier, Eric J. Dehaemer, Avinash N. Ananthakrishnan +9 more | 2016-08-16 |
| 9405351 | Performing frequency coordination in a multiprocessor system | Krishnakanth V. Sistla, Ian M. Steiner, Vivek Garg, Chris Poirier, Martin T. Rowland | 2016-08-02 |
| 9377841 | Adaptively limiting a maximum operating frequency in a multicore processor | Ian M. Steiner, Avinash N. Ananthakrishnan, Krishnakanth V. Sistla, Chris Poirier, Matthew Bace +1 more | 2016-06-28 |
| 9372524 | Dynamically modifying a power/performance tradeoff based on processor utilization | Krishnakanth V. Sistla, Mark Rowland, Ian M. Steiner, Matthew Bace, Daniel Borkowski +3 more | 2016-06-21 |
| 9336175 | Utilization-aware low-overhead link-width modulation for power reduction in interconnects | Buck Gremel, Robert G. Blankenship, Krishnakanth V. Sistla, Michael Cole | 2016-05-10 |
| 9323316 | Dynamically controlling interconnect frequency in a processor | Malini K. Bhandaru, James Vash, Monica C. Wong-Chan, Eric J. Dehaemer, Christopher Allan Poirier +1 more | 2016-04-26 |
| 9292468 | Performing frequency coordination in a multiprocessor system based on response timing optimization | Krishnakanth V. Sistla | 2016-03-22 |
| 9268393 | Enforcing a power consumption duty cycle in a processor | Krishnakanth V. Sistla, Martin T. Rowland, Brian J. Griffith, Viktor D. Vogman, Joseph R. Doucette +6 more | 2016-02-23 |
| 9170624 | User level control of power management policies | Krishnakanth V. Sistla, Jeremy J. Shrall, Stephen H. Gunther, Efraim Rotem, Alon Naveh +7 more | 2015-10-27 |
| 9158351 | Dynamic power limit sharing in a platform | Krishnakanth V. Sistla, Cesar A. Quiroz, Vivek Garg, Martin T. Rowland, Inder M. Sodhi +1 more | 2015-10-13 |
| 9098261 | User level control of power management policies | Krishnakanth V. Sistla, Jeremy J. Shrall, Stephen H. Gunther, Efraim Rotem, Alon Naveh +7 more | 2015-08-04 |
| 9053244 | Utilization-aware low-overhead link-width modulation for power reduction in interconnects | Buck Gremel, Robert G. Blankenship, Krishnakanth V. Sistla, Michael Cole | 2015-06-09 |
| 9037840 | Mechanism to provide workload and configuration-aware deterministic performance for microprocessors | Krishnakanth V. Sistla, Martin T. Rowland, Chris Poirier, Eric J. Dehaemer, Avinash N. Ananthakrishnan +9 more | 2015-05-19 |
| 9015415 | Multi-processor computing system having fast processor response to cache agent request capacity limit warning | Adrian C. Moga, Liqun Cheng | 2015-04-21 |