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Organic module EMI shielding structures and methods |
William L. Brodsky, Samuel R. Connor, Mark C. Lamorey, Janak G. Patel, Peter Slota, Jr. +1 more |
2016-01-26 |
| 8952503 |
Organic module EMI shielding structures and methods |
William L. Brodsky, Samuel R. Connor, Mark C. Lamorey, Janak G. Patel, Peter Slota, Jr. +1 more |
2015-02-10 |
| 8429590 |
System-level method for reducing power supply noise in an electronic system |
Eric W. Tremble |
2013-04-23 |
| 8312404 |
Multi-segments modeling bond wire interconnects with 2D simulations in high speed, high density wire bond packages |
Haitian Hu, Charles S. Chiu, Eric W. Tremble |
2012-11-13 |
| 8108811 |
Validation of electrical performance of an electronic package prior to fabrication |
Patrick H. Buffett, Craig Lussier |
2012-01-31 |
| 7882469 |
Automatic verification of adequate conductive return-current paths |
David C. Reynolds, Eric W. Tremble |
2011-02-01 |
| 7765509 |
Auto connection assignment system and method |
Adam Matthew Bittner, Robert Cusimano, Richard Dauphin, Matthew T. Guzowski, Craig Lussier +2 more |
2010-07-27 |
| 7454723 |
Validation of electrical performance of an electronic package prior to fabrication |
Patrick H. Buffet, Craig Lussier |
2008-11-18 |
| 7351917 |
Vents with signal image for signal return path |
Thomas P. Comino, Todd W. Davies, Ross W. Keesler, Steven G. Rosser, David B. Stone |
2008-04-01 |
| 7275229 |
Auto connection assignment system and method |
Adam Matthew Bittner, Robert Cusimano, Richard Dauphin, Matthew T. Guzowski, Craig Lussier +2 more |
2007-09-25 |
| 7197446 |
Hierarchical method of power supply noise and signal integrity analysis |
Erik Breiland, Charles S. Chiu, Paul Lee Clouser, Charles K. Erdelyi, Brian Welch |
2007-03-27 |
| 7196908 |
Dual pitch contact pad footprint for flip-chip chips and modules |
David B. Stone, Jerzy M. Zalesinski |
2007-03-27 |
| 7146596 |
Integrated circuit chip having a ringed wiring layer interposed between a contact layer and a wiring grid |
Thomas R. Bednar, Patrick H. Buffet, Alain Caron, James V. Crain, Jr., Douglas W. Kemerer +2 more |
2006-12-05 |
| 7017128 |
Concurrent electrical signal wiring optimization for an electronic package |
Jean Audet, Patrick H. Buffet, Alain Caron |
2006-03-21 |
| 6978214 |
Validation of electrical performance of an electronic package prior to fabrication |
Patrick H. Buffet, Craig Lussier |
2005-12-20 |
| 6977345 |
Vents with signal image for signal return path |
Thomas P. Comino, Todd W. Davies, Ross W. Keesler, Steven G. Rosser, David B. Stone |
2005-12-20 |
| 6945791 |
Integrated circuit redistribution package |
Eric W. Tremble, Brian Welch |
2005-09-20 |
| 6793500 |
Radial contact pad footprint and wiring for electrical components |
Esmaeil Rahmati, David B. Stone, Jerzy M. Zalesinski |
2004-09-21 |
| 6762367 |
Electronic package having high density signal wires with low resistance |
Jean Audet, Patrick H. Buffet |
2004-07-13 |
| 6703706 |
Concurrent electrical signal wiring optimization for an electronic package |
Jean Audet, Patrick H. Buffet, Alain Caron |
2004-03-09 |