Issued Patents All Time
Showing 76–100 of 157 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9218296 | Low-latency, low-overhead hybrid encryption scheme | Michele M. Franceschini, Ashish Jagmohan, Moinuddin K. Qureshi | 2015-12-22 |
| 9146882 | Securing the contents of a memory device | Michele M. Franceschini, Hillery C. Hunter, Ashish Jagmohan, Charles A. Kilmer, Kyu-hyoun Kim +1 more | 2015-09-29 |
| 9146883 | Securing the contents of a memory device | Michele M. Franceschini, Hillery C. Hunter, Ashish Jagmohan, Charles A. Kilmer, Kyu-hyoun Kim +1 more | 2015-09-29 |
| 9128868 | System for error decoding with retries and associated methods | Piyush C. Patel, Eric E. Retter, Barry M. Trager, Michael R. Trombley, Shmuel Winograd | 2015-09-08 |
| 9128834 | Implementing memory module communications with a host processor in multiported memory configurations | John Steven Dodson, Warren E. Maule, Adam J. McPadden, Kenneth L. Wright | 2015-09-08 |
| 9098425 | Implementing user mode foreign device attachment to memory channel | Bulent Abali, Michele M. Franceschini | 2015-08-04 |
| 9087612 | DRAM error detection, evaluation, and correction | Michele M. Franceschini, Hillery C. Hunter, Ashish Jagmohan, Charles A. Kilmer, Kyu-hyoun Kim +1 more | 2015-07-21 |
| 9071277 | Correction of structured burst errors in data | Michele M. Franceschini | 2015-06-30 |
| 9058276 | Per-rank channel marking in a memory system | Eldee Stephens, Patrick J. Meaney, Judy S. Johnson | 2015-06-16 |
| 9037930 | Managing errors in a DRAM by weak cell encoding | Michele M. Franceschini, Hillery C. Hunter, Ashish Jagmohan, Charles A. Kilmer, Kyu-hyoun Kim +1 more | 2015-05-19 |
| 9001609 | Hybrid latch and fuse scheme for memory repair | Michele M. Franceschini, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim | 2015-04-07 |
| 8995217 | Hybrid latch and fuse scheme for memory repair | Michele M. Franceschini, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim | 2015-03-31 |
| 8990217 | Lossless compression of high nominal-range data | Ashish Jagmohan, Joshua W. Knight | 2015-03-24 |
| 8898511 | Homogeneous recovery in a redundant memory system | Kevin C. Gower, Patrick J. Meaney, Vesselina K. Papazova, Eldee Stephens | 2014-11-25 |
| 8897062 | Memory programming for a phase change memory cell | Matthew J. Breitwisch, Roger W. Cheek, Stefanie Chiras, Ibrahim M. Elfadel, Michele M. Franceschini +3 more | 2014-11-25 |
| 8898544 | DRAM error detection, evaluation, and correction | Michele M. Franceschini, Hillery C. Hunter, Ashish Jagmohan, Charles A. Kilmer, Kyu-hyoun Kim +1 more | 2014-11-25 |
| 8887014 | Managing errors in a DRAM by weak cell encoding | Michele M. Franceschini, Hillery C. Hunter, Ashish Jagmohan, Charles A. Kilmer, Kyu-hyoun Kim +1 more | 2014-11-11 |
| 8874846 | Memory cell presetting for improved memory performance | Michele M. Franceschini, Ashish Jagmohan, John P. Karidis, Moinuddin K. Qureshi | 2014-10-28 |
| 8868978 | Reclaiming discarded solid state devices | Michele M. Franceschini, Ashish Jagmohan, Mayank Sharma | 2014-10-21 |
| 8862944 | Isolation of faulty links in a transmission medium | John Steven Dodson, Frank D. Ferraiolo, Michele M. Franceschini, Kevin C. Gower, Ashish Jagmohan +1 more | 2014-10-14 |
| 8806295 | Mis-correction and no-correction rates for error control | Ashish Jagmohan | 2014-08-12 |
| 8793544 | Channel marking for chip mark overflow and calibration errors | Judy S. Johnson, Patrick J. Meaney, Eldee Stephens | 2014-07-29 |
| 8782485 | Hierarchical channel marking in a memory system | Patrick J. Meaney, Eldee Stephens, Judy S. Johnson | 2014-07-15 |
| 8775858 | Heterogeneous recovery in a redundant memory system | Kevin C. Gower, Patrick J. Meaney, Vesselina K. Papazova, Eldee Stephens | 2014-07-08 |
| 8769335 | Homogeneous recovery in a redundant memory system | Kevin C. Gower, Patrick J. Meaney, Vesselina K. Papazova, Eldee Stephens | 2014-07-01 |