LF

L. Farnsworth

IBM: 5 patents #18,733 of 70,183Top 30%
CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
📍 Middlebury, VT: #8 of 87 inventorsTop 10%
🗺 Vermont: #1,061 of 4,968 inventorsTop 25%
Overall (All Time): #874,889 of 4,157,543Top 25%
6
Patents All Time

Issued Patents All Time

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDate
7010733 Parametric testing for high pin count ASIC Robert W. Bassett, Garrett S Christensen, Michael Combs, Pamela S. Gillis 2006-03-07
6996791 Method for optimizing a set of scan diagnostic patterns Vanessa Brunkhorst, Frank Distler, Alan R. Humphrey, Kevin W. Stanley 2006-02-07
6901542 Internal cache for on chip test data storage Thomas Bartenstein, Douglas C. Heaberlin, Edward E. Horton, III, Leendert M. Huisman, Leah Pastel +3 more 2005-05-31
6782501 System for reducing test data volume in the testing of logic products Frank Distler, Andrew Ferko, Brion Keller, Bernd Koenemann 2004-08-24
6768694 Method of electrically blowing fuses under control of an on-chip tester interface apparatus Darren L. Anand, Bruce Cowan, Pamela S. Gillis, Peter O. Jakobsen, Krishnendu Mondal +3 more 2004-07-27
6708305 Deterministic random LBIST Brion Keller, Bernd Koenemann, Timothy J. Koprowski, Thomas J. Snethen, Donald L. Wheater 2004-03-16