Issued Patents All Time
Showing 2,701–2,725 of 2,819 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7838913 | Hybrid FET incorporating a finFET and a planar FET | Qingqing Liang, Huilong Zhu | 2010-11-23 |
| 7833872 | Uniform recess of a material in a trench independent of incoming topography | Johnathan E. Faltermeier, Xi Li | 2010-11-16 |
| 7825479 | Electrical antifuse having a multi-thickness dielectric layer | Roger A. Booth, Jr., Chandrasekharan Kothandaraman, Chengwen Pei, Ravi M. Todi, Xiaojun Yu | 2010-11-02 |
| 7821098 | Trench widening without merging | Ramachandra Divakaruni | 2010-10-26 |
| 7812411 | High-k/metal gate MOSFET with reduced parasitic capacitance | — | 2010-10-12 |
| 7812387 | Trench capacitor | — | 2010-10-12 |
| 7811881 | Methods for forming semiconductor structures with buried isolation collars and semiconductor structures formed by these methods | Jack A. Mandelman | 2010-10-12 |
| 7808028 | Trench structure and method of forming trench structure | — | 2010-10-05 |
| 7795661 | Vertical SOI transistor memory cell | Jack A. Mandelman | 2010-09-14 |
| 7791124 | SOI deep trench capacitor employing a non-conformal inner spacer | Herbert L. Ho, Paul C. Parries, Geng Wang | 2010-09-07 |
| 7790530 | Dual port gain cell with side and top gated read transistor | Jack A. Mandelman, Ramachandra Divakaruni, Carl Radens, Geng Wang | 2010-09-07 |
| 7785979 | Integrated circuits comprising resistors having different sheet resistances and methods of fabricating the same | Roger A. Booth, Jr., Terence B. Hook | 2010-08-31 |
| 7785959 | Method of multi-port memory fabrication with parallel connected trench capacitors in a cell | Ramachandra Divakaruni, Jack A. Mandelman, Carl Radens, Geng Wang | 2010-08-31 |
| 7784009 | Electrically programmable π-shaped fuse structures and design process therefore | Roger A. Booth, Jr., Jack A. Mandelman, William R. Tonti | 2010-08-24 |
| 7776706 | Forming SOI trench memory with single-sided buried strap | Ramachandra Divakaruni, Herbert L. Ho, Geng Wang | 2010-08-17 |
| 7776674 | Hybrid strained orientated substrates and devices | Huilong Zhu | 2010-08-17 |
| 7772649 | SOI field effect transistor with a back gate for modulating a floating body | Louis C. Hsu, Jack A. Mandelman, Carl Radens, William R. Tonti | 2010-08-10 |
| 7767541 | Methods for forming germanium-on-insulator semiconductor structures using a porous layer and semiconductor structures formed by these methods | Brian J. Greene, Jack A. Mandelman | 2010-08-03 |
| 7767537 | Simplified method of fabricating isolated and merged trench capacitors | — | 2010-08-03 |
| 7759188 | Method of fabricating vertical body-contacted SOI transistor | Gary B. Bronner, Ramachandra Divakaruni, Carl Radens | 2010-07-20 |
| 7759191 | Vertical SOI transistor memory cell and method of forming the same | Jack A. Mandelman | 2010-07-20 |
| 7759766 | Electrical fuse having a thin fuselink | Roger A. Booth, Jr., MaryJane Brodsky, Chengwen Pei | 2010-07-20 |
| 7749835 | Trench memory with self-aligned strap formed by self-limiting process | Xi Li, Johnathan E. Faltermeier | 2010-07-06 |
| 7737530 | Semiconductor device structures for bipolar junction transistors and methods of fabricating such structures | Louis L. Hsu, Jack A. Mandelman | 2010-06-15 |
| 7737482 | Self-aligned strap for embedded trench memory on hybrid orientation substrate | Ramachandra Divakaruni, Carl Radens | 2010-06-15 |