Issued Patents All Time
Showing 101–125 of 133 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9443957 | Self-aligned source and drain regions for semiconductor devices | Bahman Hekmatshoartabari, Jeehwan Kim, Siegfried Maurer, Devendra K. Sadana | 2016-09-13 |
| 9418870 | Silicon germanium-on-insulator formation by thermal mixing | Stephen W. Bedell, Jeehwan Kim, Devendra K. Sadana | 2016-08-16 |
| 9401397 | Reduction of defect induced leakage in III-V semiconductor devices | Jeehwan Kim, Devendra K. Sadana, Brent A. Wacaser | 2016-07-26 |
| 9385023 | Method and structure to make fins with different fin heights and no topography | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek, Dominic J. Schepis | 2016-07-05 |
| 9059245 | Semiconductor-on-insulator (SOI) substrates with ultra-thin SOI layers and buried oxides | Tze-Chiang Chen, Devendra K. Sadana, Ghavam G. Shahidi | 2015-06-16 |
| 8617938 | Device and method for boron diffusion in semiconductors | Marinus Hopstaken, Jeehwan Kim, Devendra K. Sadana | 2013-12-31 |
| 8598006 | Strain preserving ion implantation methods | Masafumi Hamaguchi, Ahmet S. Ozcan, Devendra K. Sadana, Katherine L. Saenger, Donald R. Wall | 2013-12-03 |
| 8431476 | Method to prevent surface decomposition of III-V compound semiconductors | Keith E. Fogel, Edward W. Kiewra, Steven J. Koester, Christopher C. Parks, Devendra K. Sadana +1 more | 2013-04-30 |
| 8415772 | Method to prevent surface decomposition of III-V compound semiconductors | Keith E. Fogel, Edward W. Kiewra, Steven J. Koester, Christopher C. Parks, Devendra K. Sadana +1 more | 2013-04-09 |
| 8361889 | Strained semiconductor-on-insulator by addition and removal of atoms in a semiconductor-on-insulator | Thomas N. Adam, Stephen W. Bedell, Keith E. Fogel, Alexander Reznicek, Devendra K. Sadana +1 more | 2013-01-29 |
| 8273649 | Method to prevent surface decomposition of III-V compound semiconductors | Keith E. Fogel, Edward W. Kiewra, Steven J. Koester, Christopher C. Parks, Devendra K. Sadana +1 more | 2012-09-25 |
| 8138061 | Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide | John A. Ott, Alexander Reznicek, Devendra K. Sadana, Katherine L. Saenger | 2012-03-20 |
| 8053330 | Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide | John A. Ott, Alexander Reznicek, Devendra K. Sadana, Katherine L. Saenger | 2011-11-08 |
| 7914619 | Thick epitaxial silicon by grain reorientation annealing and applications thereof | Keith E. Fogel, Daniel A. Inns, Devendra K. Sadana, Katherine L. Saenger | 2011-03-29 |
| 7897444 | Strained semiconductor-on-insulator (sSOI) by a simox method | Thomas N. Adam, Stephen W. Bedell, Keith E. Fogel, Alexander Reznicek, Devendra K. Sadana +1 more | 2011-03-01 |
| 7842940 | Structure and method to form semiconductor-on-pores (SOP) for high device performance and low manufacturing cost | Keith E. Fogel, Brian J. Greene, Devendra K. Sadana, Haining Yang | 2010-11-30 |
| 7833884 | Strained semiconductor-on-insulator by Si:C combined with porous process | Stephen W. Bedell, Alexander Reznicek, Devendra K. Sadana | 2010-11-16 |
| 7785939 | Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers | John A. Ott, Alexander Reznicek, Katherine L. Saenger | 2010-08-31 |
| 7749869 | Crystalline silicon substrates with improved minority carrier lifetime including a method of annealing and removing SiOx precipitates and getterning sites | Harold J. Hovel, Daniel A. Inns, Devendra K. Sadana, Ghavam G. Shahidi | 2010-07-06 |
| 7592671 | Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer | Thomas N. Adam, Stephen W. Bedell, Keith E. Fogel, Alexander Reznicek, Devendra K. Sadana +1 more | 2009-09-22 |
| 7550369 | Method for fabricating low-defect-density changed orientation Si | Keith E. Fogel, John A. Ott, Devendra K. Sadana, Katherine L. Saenger | 2009-06-23 |
| 7511317 | Porous silicon for isolation region formation and related structure | Thomas N. Adam, Stephen W. Bedell, Kathryn T. Schonenberg, Thomas A. Wallner | 2009-03-31 |
| 7485539 | Strained semiconductor-on-insulator (sSOI) by a simox method | Thomas N. Adam, Stephen W. Bedell, Keith E. Fogel, Alexander Reznicek, Devendra K. Sadana +1 more | 2009-02-03 |
| 7365399 | Structure and method to form semiconductor-on-pores (SOP) for high device performance and low manufacturing cost | Keith E. Fogel, Brian J. Greene, Devendra K. Sadana, Haining Yang | 2008-04-29 |
| 7342293 | Bipolar junction transistors (BJTS) with second shallow trench isolation (STI) regions, and methods for forming same | Thomas A. Wallner, Thomas N. Adam, Stephen W. Bedell | 2008-03-11 |