Issued Patents All Time
Showing 376–400 of 472 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6615320 | Store collapsing mechanism for SMP computer system | Ravi Kumar Arimilli, John Steven Dodson | 2003-09-02 |
| 6615321 | Mechanism for collapsing store misses in an SMP computer system | Ravi Kumar Arimilli, John Steven Dodson | 2003-09-02 |
| 6609192 | System and method for asynchronously overlapping storage barrier operations with old and new storage operations | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 2003-08-19 |
| 6606702 | Multiprocessor speculation mechanism with imprecise recycling of storage operations | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 2003-08-12 |
| 6601144 | Dynamic cache management in a symmetric multiprocessor system via snoop operation sequence analysis | Ravi Kumar Arimilli, John Steven Dodson, James Stephen Fields, Jr. | 2003-07-29 |
| 6601145 | Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopers that uses dynamic hardware/software controls | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Jody B. Joyner | 2003-07-29 |
| 6598118 | Data processing system with HSA (hashed storage architecture) | Ravi Kumar Arimilli, Leo James Clark, John S. Dodson, Jerry Don Lewis | 2003-07-22 |
| 6591307 | Multi-node data processing system and method of queue management in which a queued operation is speculatively cancelled in response to a partial combined response | Ravi Kumar Arimilli, James Stephen Fields, Jr., Jody B. Joyner, Jerry Don Lewis | 2003-07-08 |
| 6591321 | Multiprocessor system bus protocol with group addresses, responses, and priorities | Ravi Kumar Arimilli, James Stephen Fields, Jr., Jody B. Joyner, Jerry Don Lewis | 2003-07-08 |
| 6581139 | Set-associative cache memory having asymmetric latency among sets | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, James Stephen Fields, Jr. | 2003-06-17 |
| 6574714 | Efficient instruction cache coherency maintenance mechanism for scalable multiprocessor computer system with write-back data cache | Ravi Kumar Arimilli, John Steven Dodson | 2003-06-03 |
| 6571322 | Multiprocessor computer system with sectored cache line mechanism for cache intervention | Ravi Kumar Arimilli, John Steven Dodson | 2003-05-27 |
| 6553462 | Multiprocessor computer system with sectored cache line mechanism for load and store operations | Ravi Kumar Arimilli, John Steven Dodson | 2003-04-22 |
| 6549989 | Extended cache coherency protocol with a “lock released” state | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, William J. Starke | 2003-04-15 |
| 6546470 | Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopers with banked directory implementation | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Jody B. Joyner | 2003-04-08 |
| 6546469 | Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopers | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Jody B. Joyner | 2003-04-08 |
| 6546468 | Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopers performing directory update | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Jody B. Joyner | 2003-04-08 |
| 6535957 | System bus read data transfers with bus utilization based data ordering | Ravi Kumar Arimilli, Vicente Enrique Chung, Jody B. Joyner | 2003-03-18 |
| 6532521 | Mechanism for high performance transfer of speculative request data between levels of cache hierarchy | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, Leo James Clark, John Steven Dodson, James Stephen Fields, Jr. | 2003-03-11 |
| 6519665 | Multi-node data processing system and communication protocol in which a stomp signal is propagated to cancel a prior request | Ravi Kumar Arimilli, James Stephen Fields, Jr., Jody B. Joyner, Jerry Don Lewis | 2003-02-11 |
| 6519649 | Multi-node data processing system and communication protocol having a partial combined response | Ravi Kumar Arimilli, James Stephen Fields, Jr., Jody B. Joyner, Jerry Don Lewis | 2003-02-11 |
| 6516404 | Data processing system having hashed architected processor facilities | Ravi Kumar Arimilli, Leo James Clark, John S. Dodson, Jerry Don Lewis | 2003-02-04 |
| 6510494 | Time based mechanism for cached speculative data deallocation | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, Leo James Clark, John Steven Dodson, James Stephen Fields, Jr. | 2003-01-21 |
| 6502171 | Multiprocessor system bus with combined snoop responses explicitly informing snoopers to scarf data | Ravi Kumar Arimilli, John Steven Dodson, Jody B. Joyner, Jerry Don Lewis | 2002-12-31 |
| 6496921 | Layered speculative request unit with instruction optimized and storage hierarchy optimized partitions | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, Leo James Clark, John Steven Dodson, James Stephen Fields, Jr. | 2002-12-17 |