Issued Patents All Time
Showing 426–450 of 472 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6393528 | Optimized cache allocation algorithm for multiple speculative requests | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, Leo James Clark, John Steven Dodson, James Stephen Fields, Jr. | 2002-05-21 |
| 6385702 | High performance multiprocessor system with exclusive-deallocate cache state | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, William J. Starke | 2002-05-07 |
| 6385694 | High performance load instruction management via system bus with explicit register load and/or cache reload protocols | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson | 2002-05-07 |
| 6374333 | Cache coherency protocol in which a load instruction hint bit is employed to indicate deallocation of a modified cache line supplied by intervention | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, William J. Starke | 2002-04-16 |
| 6360297 | System bus read address operations with data ordering preference hint bits for vertical caches | Ravi Kumar Arimilli, Vicente Enrique Chung, Jody B. Joyner | 2002-03-19 |
| 6360299 | Extended cache state with prefetched stream ID information | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, Leo James Clark, John Steven Dodson, James Stephen Fields, Jr. | 2002-03-19 |
| 6353875 | Upgrading of snooper cache state mechanism for system bus with read/castout (RCO) address transactions | Ravi Kumar Arimilli, John Steven Dodson, Jody B. Joyner, Jerry Don Lewis | 2002-03-05 |
| 6349369 | Protocol for transferring modified-unsolicited state during data intervention | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, William J. Starke | 2002-02-19 |
| 6349367 | Method and system for communication in which a castout operation is cancelled in response to snoop responses | Ravi Kumar Arimilli, John Steven Dodson, Jody B. Joyner, Jerry Don Lewis | 2002-02-19 |
| 6349360 | System bus read address operations with data ordering preference hint bits | Ravi Kumar Arimilli, Vicente Enrique Chung, Jody B. Joyner | 2002-02-19 |
| 6345344 | Cache allocation mechanism for modified-unsolicited cache state that modifies victimization priority bits | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, William J. Starke | 2002-02-05 |
| 6345343 | Multiprocessor system bus protocol with command and snoop responses for modified-unsolicited cache state | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, William J. Starke | 2002-02-05 |
| 6345342 | Cache coherency protocol employing a read operation including a programmable flag to indicate deallocation of an intervened cache line | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, William J. Starke | 2002-02-05 |
| 6343347 | Multiprocessor system bus with cache state and LRU snoop responses for read/castout (RCO) address transaction | Ravi Kumar Arimilli, John Steven Dodson, Jody B. Joyner, Jerry Don Lewis | 2002-01-29 |
| 6343344 | System bus directory snooping mechanism for read/castout (RCO) address transaction | Ravi Kumar Arimilli, John Steven Dodson, Jody B. Joyner, Jerry Don Lewis | 2002-01-29 |
| 6338119 | Method and apparatus with page buffer and I/O page kill definition for improved DMA and L1/L2 cache performance | Gary D. Anderson, Ronald Xavier Arroyo, Bradly G. Frey | 2002-01-08 |
| 6338124 | Multiprocessor system bus with system controller explicitly updating snooper LRU information | Ravi Kumar Arimilli, John Steven Dodson, Jody B. Joyner, Jerry Don Lewis | 2002-01-08 |
| 6336169 | Background kill system bus transaction to optimize coherency transactions on a multiprocessor system bus | Ravi Kumar Arimilli, James S. Fields, Jr. | 2002-01-01 |
| 6327636 | Ordering for pipelined read transfers | Richard Allen Kelley, Danny Marvin Neal, Steven M. Thurber | 2001-12-04 |
| 6324617 | Method and system for communicating tags of data access target and castout victim in a single data transfer | Ravi Kumar Arimilli, John Steven Dodson, Jody B. Joyner, Jerry Don Lewis | 2001-11-27 |
| 6321305 | Multiprocessor system bus with combined snoop responses explicitly cancelling master allocation of read data | Ravi Kumar Arimilli, John Steven Dodson, Jody B. Joyner, Jerry Don Lewis | 2001-11-20 |
| 6321306 | High performance multiprocessor system with modified-unsolicited cache state | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, William J. Starke | 2001-11-20 |
| 6314498 | Multiprocessor system bus transaction for transferring exclusive-deallocate cache state to lower lever cache | Ravi Kumar Arimilli, Lakshminarayana B. Arimilli, John Steven Dodson, William J. Starke | 2001-11-06 |
| 6279086 | Multiprocessor system bus with combined snoop responses implicitly updating snooper LRU position | Ravi Kumar Arimilli, John Steven Dodson, Jody B. Joyner, Jerry Don Lewis | 2001-08-21 |
| 6275909 | Multiprocessor system bus with system controller explicitly updating snooper cache state information | Ravi Kumar Arimilli, John Steven Dodson, Jody B. Joyner, Jerry Don Lewis | 2001-08-14 |