Issued Patents All Time
Showing 176–200 of 273 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9335995 | Convert to zoned format from decimal floating point format | Steven R. Carlough, Reid T. Copeland, Charles W. Gainey, Jr., Marcel Mitran, Timothy J. Slegel | 2016-05-10 |
| 9336047 | Prefetching of discontiguous storage locations in anticipation of transactional execution | Fadi Y. Busaba, Dan F. Greiner, Michael K. Gschwind, Maged M. Michael, Valentina Salapura +1 more | 2016-05-10 |
| 9336097 | Salvaging hardware transactions | Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Valentina Salapura | 2016-05-10 |
| 9329946 | Salvaging hardware transactions | Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Valentina Salapura | 2016-05-03 |
| 9329890 | Managing high-coherence-miss cache lines in multi-processor computing environments | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Valentina Salapura +1 more | 2016-05-03 |
| 9329861 | Convert to zoned format from decimal floating point format | Steven R. Carlough, Reid T. Copeland, Charles W. Gainey, Jr., Marcel Mitran, Timothy J. Slegel | 2016-05-03 |
| 9323568 | Indicating a low priority transaction | Fadi Y. Busaba, Michael K. Gschwind | 2016-04-26 |
| 9311178 | Salvaging hardware transactions with instructions | Fadi Y. Busaba, Harold W. Cain, III, Maged M. Michael, Valentina Salapura | 2016-04-12 |
| 9298626 | Managing high-conflict cache lines in transactional memory computing environments | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Valentina Salapura +1 more | 2016-03-29 |
| 9298623 | Identifying high-conflict cache lines in transactional memory computing environments | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Valentina Salapura +1 more | 2016-03-29 |
| 9292256 | Shift significand of decimal floating point data | Shawn D. Lundvall, Ronald M. Smith, Sr., Phil C. Yeh | 2016-03-22 |
| 9292444 | Multi-granular cache management in multi-processor computing environments | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Valentina Salapura +1 more | 2016-03-22 |
| 9268572 | Modify and execute next sequential instruction facility and instructions therefor | Michael K. Gschwind | 2016-02-23 |
| 9262343 | Transactional processing based upon run-time conditions | Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum | 2016-02-16 |
| 9250904 | Modify and execute sequential instruction facility and instructions therefor | Michael K. Gschwind | 2016-02-02 |
| 9244654 | Decimal floating-point quantum exception detection | Michael F. Cowlishaw, Silvia M. Mueller, Phil C. Yeh | 2016-01-26 |
| 9244782 | Salvaging hardware transactions | Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Valentina Salapura | 2016-01-26 |
| 9244781 | Salvaging hardware transactions | Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Valentina Salapura | 2016-01-26 |
| 9201846 | Round for reround mode in a decimal floating point instruction | Michael F. Cowlishaw, Ronald M. Smith, Sr., Phil C. Yeh | 2015-12-01 |
| 9158573 | Dynamic predictor for coalescing memory transactions | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael | 2015-10-13 |
| 9104399 | Dual issuing of complex instruction set instructions | Fadi Y. Busaba, Brian W. Curran, Lee Evan Eisen, Christian Jacobi, David A. Schroter | 2015-08-11 |
| 9086974 | Centralized management of high-contention cache lines in multi-processor computing environments | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Valentina Salapura +1 more | 2015-07-21 |
| 9047343 | Find regular expression instruction on substring of larger string | — | 2015-06-02 |
| 8938605 | Instruction cracking based on machine state | Fadi Y. Busaba, Bruce C. Giamei, David S. Hutton | 2015-01-20 |
| 8838942 | Multifunction hexadecimal instruction form system and program product | Ronald M. Smith, Sr. | 2014-09-16 |