Issued Patents All Time
Showing 51–75 of 91 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8850378 | Hierarchical design of integrated circuits with multi-patterning requirements | Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, Peter A. Habitz, David J. Hathaway +4 more | 2014-09-30 |
| 8850380 | Selective voltage binning within a three-dimensional integrated chip stack | Jeanne P. Bickford | 2014-09-30 |
| 8843874 | Power and timing optimization for an integrated circuit by voltage modification across various ranges of temperatures | Jeanne P. Bickford, Mark W. Kuemerle, Susan K. Lichtensteiger | 2014-09-23 |
| 8839165 | Power/performance optimization through continuously variable temperature-based voltage control | Jeanne P. Bickford, Mark W. Kuemerle, Susan K. Lichtensteiger | 2014-09-16 |
| 8839167 | Reducing runtime and memory requirements of static timing analysis | Brian M. Dreibelbis, John P. Dubuque, David J. Hathaway, Jeffrey G. Hemmett, Natesan Venkateswaran +2 more | 2014-09-16 |
| 8839170 | Power/performance optimization through temperature/voltage control | Jeanne P. Bickford, Mark W. Kuemerle, Susan K. Lichtensteiger | 2014-09-16 |
| 8832625 | Systems and methods for correlated parameters in statistical static timing analysis | Peter A. Habitz, David J. Hathaway, Jeffrey G. Hemmett, Natesan Venkateswaran, Chandramouli Visweswariah +1 more | 2014-09-09 |
| 8806402 | Modeling multi-patterning variability with statistical timing | Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, Peter A. Habitz, David J. Hathaway +4 more | 2014-08-12 |
| 8768679 | System and method for efficient modeling of NPskew effects on static timing tests | Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, Peter A. Habitz, Jeffrey G. Hemmett +3 more | 2014-07-01 |
| 8769452 | Parasitic extraction in an integrated circuit with multi-patterning requirements | Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, Peter A. Habitz, David J. Hathaway +4 more | 2014-07-01 |
| 8719763 | Frequency selection with selective voltage binning | Jeanne P. Bickford, Vladimir Zolotov | 2014-05-06 |
| 8707233 | Systems and methods for correlated parameters in statistical static timing analysis | Peter A. Habitz, David J. Hathaway, Jeffrey G. Hemmett, Natesan Venkateswaran, Chandramouli Visweswariah +1 more | 2014-04-22 |
| 8656207 | Method for modeling variation in a feedback loop of a phase-locked loop | Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, Peter A. Habitz | 2014-02-18 |
| 8560989 | Statistical clock cycle computation | Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, James C. Gregerson, Peter A. Habitz +6 more | 2013-10-15 |
| 8543960 | Power and timing optimization for an integrated circuit by voltage modification across various ranges of temperatures | Jeanne P. Bickford, Mark W. Kuemerle, Susan K. Lichtensteiger | 2013-09-24 |
| 8468483 | Method, system and program storage device for performing a parameterized statistical static timing analysis (SSTA) of an integrated circuit taking into account setup and hold margin interdependence | Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, Peter A. Habitz, Jeffrey G. Hemmett +4 more | 2013-06-18 |
| 8458632 | Efficient slack projection for truncated distributions | James C. Gregerson, Peter A. Habitz, Jeffrey G. Hemmett, Debjit Sinha, Natesan Venkateswaran +3 more | 2013-06-04 |
| 8448110 | Method to reduce delay variation by sensitivity cancellation | Peter A. Habitz, Gustavo E. Tellez | 2013-05-21 |
| 8413095 | Statistical single library including on chip variation for rapid timing and power analysis | John P. Dubuque, Peter A. Habitz, Jeffrey G. Hemmett, Amol A. Joshi, Christopher J. Kiegle +2 more | 2013-04-02 |
| 8141014 | System and method for common history pessimism relief during static timing analysis | Peter A. Habitz, David J. Hathaway, Jeffrey G. Hemmett, Kerim Kalafala, Jeffrey P. Soreff | 2012-03-20 |
| 8141025 | Method of performing timing analysis on integrated circuit chips with consideration of process variations | Debjit Sinha, Peter A. Habitz, Natesan Venkateswaran, Chandramouli Visweswariah, Vladimir Zolotov | 2012-03-20 |
| 8141012 | Timing closure on multiple selective corners in a single statistical timing run | Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, Peter A. Habitz, Jeffrey G. Hemmett +4 more | 2012-03-20 |
| 8108816 | Device history based delay variation adjustment during static timing analysis | Peter A. Habitz, David J. Hathaway, Jeffrey G. Hemmett, Kerim Kalafala, Jeffrey P. Soreff | 2012-01-31 |
| 8086988 | Chip design and fabrication method optimized for profit | Nathan C. Buck, Howard H. Chen, James Eckhardt, James C. Gregerson, Peter A. Habitz +3 more | 2011-12-27 |
| 8056035 | Method and system for analyzing cross-talk coupling noise events in block-based statistical static timing | Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, Peter A. Habitz, David J. Hathaway +2 more | 2011-11-08 |