Issued Patents All Time
Showing 151–175 of 254 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9466030 | Implementing stochastic networks using magnetic tunnel junctions | Bryan L. Jackson | 2016-10-11 |
| 9460383 | Reconfigurable and customizable general-purpose circuits for neural networks | Bernard V. Brezzo, Leland Chang, Steven K. Esser, Daniel J. Friedman, Yong Liu +4 more | 2016-10-04 |
| 9424284 | Mapping neural dynamics of a neural model on to a coarsely grained look-up table | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Paul A. Merolla | 2016-08-23 |
| 9412063 | Transform architecture for multiple neurosynaptic core circuits | Rathinakumar Appuswamy, Myron D. Flickner | 2016-08-09 |
| 9406015 | Transform for a neurosynaptic core circuit | Rathinakumar Appuswamy, Myron D. Flickner | 2016-08-02 |
| 9400954 | Multi-scale spatio-temporal neural network system | — | 2016-07-26 |
| 9390372 | Unsupervised, supervised, and reinforced learning via spiking computation | — | 2016-07-12 |
| 9390368 | Coupling parallel event-driven computation with serial computation | Bryan L. Jackson, Norman J. Pass | 2016-07-12 |
| 9373073 | Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a universal substrate of adaptation | John V. Arthur, Bernard V. Brezzo, Leland Chang, Daniel J. Friedman, Paul A. Merolla +3 more | 2016-06-21 |
| 9373058 | Scene understanding using a neurosynaptic system | Alexander Andreopoulos, Rathinakumar Appuswamy, Pallab Datta, Steven K. Esser | 2016-06-21 |
| 9368489 | Interconnect circuits at three-dimensional (3-D) bonding interfaces of a processor array | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, John E. Barth, Jr., Andrew S. Cassidy, Subramanian S. Iyer +3 more | 2016-06-14 |
| 9363137 | Faulty core recovery mechanisms for a three-dimensional network on a processor array | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, John E. Barth, Jr., Andrew S. Cassidy, Subramanian S. Iyer +1 more | 2016-06-07 |
| 9355331 | Extracting salient features from video using a neurosynaptic system | Alexander Andreopoulos, Steven K. Esser | 2016-05-31 |
| 9292788 | Event-driven universal neural network circuit | — | 2016-03-22 |
| 9275330 | Multi-compartment neurons with neural cores | Steven K. Esser | 2016-03-01 |
| 9269042 | Producing spike-timing dependent plasticity in a neuromorphic network utilizing phase change synaptic devices | Daniel J. Friedman, Seongwon Kim, Chung H. Lam, Bipin Rajendran, Jose A. Tierno | 2016-02-23 |
| 9269044 | Neuromorphic event-driven neural computing architecture in a scalable neural network | Filipp A. Akopyan, John V. Arthur, Rajit Manohar, Paul A. Merolla, Alyosha Molnar +1 more | 2016-02-23 |
| 9262712 | Structural descriptions for neurosynaptic networks | — | 2016-02-16 |
| 9245223 | Unsupervised, supervised and reinforced learning via spiking computation | — | 2016-01-26 |
| 9245222 | Synaptic, dendritic, somatic, and axonal plasticity in a network of neural cores using a plastic multi-stage crossbar switching | — | 2016-01-26 |
| 9244124 | Initializing and testing integrated circuits with selectable scan chains with exclusive-or outputs | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Bryan L. Jackson, Paul A. Merolla +1 more | 2016-01-26 |
| 9239984 | Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a neural network | John V. Arthur, Bernard V. Brezzo, Leland Chang, Daniel J. Friedman, Paul A. Merolla +3 more | 2016-01-19 |
| 9218564 | Providing transposable access to a synapse array using a recursive array layout | John V. Arthur, John E. Barth, Jr., Paul A. Merolla | 2015-12-22 |
| 9195903 | Extracting salient features from video using a neurosynaptic system | Alexander Andreopoulos, Steven K. Esser | 2015-11-24 |
| 9189729 | Scalable neural hardware for the noisy-OR model of Bayesian networks | John V. Arthur, Steven K. Esser, Paul A. Merolla | 2015-11-17 |