Issued Patents All Time
Showing 51–73 of 73 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7683416 | Post STI trench capacitor | Anil K. Chinthakindi, Xi Li | 2010-03-23 |
| 7682922 | Post STI trench capacitor | Anil K. Chinthakindi, Xi Li | 2010-03-23 |
| 7675137 | Electrical fuse having sublithographic cavities thereupon | Wai-Kin Li, Haining Yang | 2010-03-09 |
| 7633079 | Programmable fuse/non-volatile memory structures in BEOL regions using externally heated phase change material | Kuang-Neng Chen, Bruce G. Elmegreen, Chandrasekharan Kothandaraman, Lia Krusin-Elbaum, Chung H. Lam +3 more | 2009-12-15 |
| 7601646 | Top-oxide-early process and array top oxide planarization | Ramachandra Divakaruni, Hiroyuki Akatsu, George Worth, Jay William Strane, Byeong Y. Kim | 2009-10-13 |
| 7566593 | Fuse structure including cavity and methods for fabrication thereof | Anil K. Chinthakindi, Chandrasekharan Kothandaraman | 2009-07-28 |
| 7564086 | Self-aligned, silicided, trench-based DRAM/eDRAM processes with improved retention | Oh-Jung Kwon, Kim Bosang, Herbert L. Ho, Ali Babar Khan | 2009-07-21 |
| 7550323 | Electrical fuse with a thinned fuselink middle portion | Dureseti Chidambarrao, William K. Henson, Chandrasekharan Kothandaraman | 2009-06-23 |
| 7545034 | Thermal energy removal structure and method | Wai-Kin Li, Haining Yang | 2009-06-09 |
| 7521763 | Dual stress STI | Seong-Dong Kim, Oh-Jung Kwon | 2009-04-21 |
| 7497959 | Methods and structures for protecting one area while processing another area on a chip | Kenneth T. Settlemyer, Jr., Kangguo Cheng, Ramachandra Divakaruni, Carl Radens, Dirk Pfeiffer +4 more | 2009-03-03 |
| 7485910 | Simplified vertical array device DRAM/eDRAM integration: method and structure | Ramachandra Divakaruni, Carl Radens, Dae-Gyu Park | 2009-02-03 |
| 7479689 | Electronically programmable fuse having anode and link surrounded by low dielectric constant material | Xiangdong Chen, Haining Yang | 2009-01-20 |
| 7432755 | Programming current stabilized electrical fuse programming circuit and method | Byeongju Park, John M. Safran, Yongsang Cho | 2008-10-07 |
| 7411818 | Programmable fuse/non-volatile memory structures using externally heated phase change material | Bruce G. Elmegreen, Subramanian S. Iyer, Lia Krusin-Elbaum, Dennis M. Newns, Byeongju Park | 2008-08-12 |
| 7353188 | Product selling system and method for operating the same | Young Ho Yim, Baek Geun Ahn | 2008-04-01 |
| 7345904 | Method for programming an electronically programmable semiconductor fuse | Byeongju Park, John M. Safran | 2008-03-18 |
| 7195972 | Trench capacitor DRAM cell using buried oxide as array top oxide | Dureseti Chidambarrao, Ramachandra Divakaruni | 2007-03-27 |
| 7193262 | Low-cost deep trench decoupling capacitor device and process of manufacture | Herbert L. Ho, John E. Barth, Jr., Ramachandra Divakaruni, Wayne F. Ellis, Johnathan E. Faltermeier +4 more | 2007-03-20 |
| 7153737 | Self-aligned, silicided, trench-based, DRAM/EDRAM processes with improved retention | Oh-Jung Kwon, Kim Bosang, Herbert L. Ho, Babar A. Khan | 2006-12-26 |
| 6884715 | Method for forming a self-aligned contact with a silicide or damascene conductor and the structure formed thereby | Oh-Jung Kwon, Kangguo Cheng, Carl Radens | 2005-04-26 |
| 6830968 | Simplified top oxide late process | Ramachandra Divakaruni | 2004-12-14 |
| 6787838 | Trench capacitor DRAM cell using buried oxide as array top oxide | Dureseti Chidambarrao, Ramachandra Divakaruni | 2004-09-07 |