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Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
DN

Daniel Mark Nelson — 26 Patents

IBM: 25 patents #4,231 of 70,183Top 7%
APAvago Technologies General Ip (Singapore) Pte.: 1 patents #883 of 2,004Top 45%
Minneapolis, MN: #168 of 6,114 inventorsTop 3%
Minnesota: #2,446 of 52,454 inventorsTop 5%
Overall (All Time): #150,017 of 4,157,543Top 4%
26 Patents All Time
Daniel Mark Nelson has been granted 26 US patents while listed as an inventor at IBM. The first was granted in 2008 and the most recent in May 2018. Daniel Mark Nelson ranks #150,017 of 4,157,543 US inventors in our database (top 3.6%). Patent records list Daniel Mark Nelson in Minneapolis, MN, US.

Patents per Year

Patents granted per year, 2008 to 2018Bar chart with a peak of 7 patents in 2010.peak 72008: 1 patents20082009: 3 patents20092010: 7 patents20102011: 3 patents20112012: 2 patents20122013: 4 patents20132014: 4 patents20142015: 1 patents20152018: 1 patents2018

Issued Patents All Time

Showing 1–25 of 26 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9959926 Method and apparatus for selective write assist using shared boost capacitor Travis R. Hebig, Richard J. Stephani 2018-05-01 $182,520,000
9142560 Layout to minimize FET variation in small dimension photolithography Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Michael Launsbach 2015-09-22 $4,871,000
8860141 Layout to minimize FET variation in small dimension photolithography Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Michael Launsbach 2014-10-14 $3,785,000
8824196 Single cycle data copy for two-port SRAM Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Michael Launsbach 2014-09-02 $3,373,000
8711606 Data security for dynamic random access memory using body bias to clear data at power-up Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Michael Launsbach 2014-04-29 $5,775,000
8675427 Implementing RC and coupling delay correction for SRAM Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Michael Launsbach 2014-03-18 $3,993,000
8520429 Data dependent SRAM write assist Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Michael Launsbach 2013-08-27 $5,858,000
8467230 Data security for dynamic random access memory using body bias to clear data at power-up Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Michael Launsbach 2013-06-18 $7,677,000
8395963 Data security for dynamic random access memory at power-up Derick G. Behrends, Todd A. Christensen, Travis R. Hebig 2013-03-12 $9,153,000
8344782 Method and apparatus to limit circuit delay dependence on voltage for single phase transition Derick G. Behrends, Todd A. Christensen, Travis R. Hebig 2013-01-01
8279687 Single supply sub VDD bit-line precharge SRAM and method for level shifting Chad A. Adams, George M. Braceras, Harold Pilo, Vinod Ramadurai 2012-10-02 $13,900,000
8159260 Delay chain burn-in for increased repeatability of physically unclonable functions Derick G. Behrends, Todd A. Christensen, Travis R. Hebig 2012-04-17 $5,847,000
7971164 Assessing resources required to complete a VLSI design Derick G. Behrends, Travis R. Hebig, Jesse D. Smith 2011-06-28 $4,369,000
7924633 Implementing boosted wordline voltage in memories Derick G. Behrends, Todd A. Christensen, Travis R. Hebig 2011-04-12 $5,593,000
7911827 Implementing enhanced SRAM stability and enhanced chip yield with configurable wordline voltage levels Derick G. Behrends, Travis R. Hebig, Jesse D. Smith 2011-03-22 $5,211,000
7788554 Design structure embodied in a machine readable medium for implementing SRAM cell write performance evaluation Chad A. Adams, Derick G. Behrends, Travis R. Hebig 2010-08-31 $3,369,000
7768851 Apparatus for implementing SRAM cell write performance evaluation Chad A. Adams, Derick G. Behrends, Travis R. Hebig 2010-08-03 $4,325,000
7751266 High performance read bypass test for SRAM circuits Chad A. Adams, Derick G. Behrends, Jeffrey M. Scherer 2010-07-06 $3,063,000
7737757 Low power level shifting latch circuits with gated feedback for high speed integrated circuits Derick G. Behrends, Travis R. Hebig, Jesse D. Smith 2010-06-15 $4,416,000
7724586 Implementing local evaluation of domino read SRAM with enhanced SRAM cell stability with minimized area usage Chad A. Adams, Todd A. Christensen, Peter Thomas Freiburger 2010-05-25 $4,007,000
7724585 Implementing local evaluation of domino read SRAM with enhanced SRAM cell stability Derick G. Behrends, Travis R. Hebig, Jesse D. Smith 2010-05-25 $4,007,000
7714630 Method and apparatus to limit circuit delay dependence on voltage Derick G. Behrends, Todd A. Christensen, Travis R. Hebig 2010-05-11 $5,650,000
7535776 Circuit for improved SRAM write around with reduced read access penalty Derick G. Behrends, Travis R. Hebig, Jesse D. Smith 2009-05-19 $10,497,000
7505340 Method for implementing SRAM cell write performance evaluation Chad A. Adams, Derick G. Behrends, Travis R. Hebig 2009-03-17 $4,806,000
7502276 Method and apparatus for multi-word write in domino read SRAMs Derick G. Behrends, Todd A. Christensen, Travis R. Hebig 2009-03-10 $6,331,000