Issued Patents All Time
Showing 25 most recent of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10916323 | Memory interface latch with integrated write-through and fence functions | Elizabeth L. Gerhard, Todd A. Christensen, Peter Thomas Freiburger | 2021-02-09 |
| 10381098 | Memory interface latch with integrated write-through and fence functions | Elizabeth L. Gerhard, Todd A. Christensen, Peter Thomas Freiburger | 2019-08-13 |
| 10229748 | Memory interface latch with integrated write-through function | Elizabeth L. Gerhard, Todd A. Christensen, Peter Thomas Freiburger | 2019-03-12 |
| 10060343 | Air flow system for an enclosed portable generator | Jonathan Boutot, Joel Soto | 2018-08-28 |
| 9251869 | Deep sleep wakeup of multi-bank memory | Thinh V. Luong, Jesse D. Smith | 2016-02-02 |
| 9183896 | Deep sleep wakeup of multi-bank memory | Thinh V. Luong, Jesse D. Smith | 2015-11-10 |
| 9183906 | Fine granularity power gating | Harold Pilo | 2015-11-10 |
| 9087607 | Implementing sense amplifier for sensing local write driver with bootstrap write assist for SRAM arrays | Elizabeth L. Gerhard, Jeffrey M. Scherer | 2015-07-21 |
| 9007857 | SRAM global precharge, discharge, and sense | Sharon H. Cesky, Elizabeth L. Gerhard, Jeffrey M. Scherer | 2015-04-14 |
| 9007858 | SRAM global precharge, discharge, and sense | Sharon H. Cesky, Elizabeth L. Gerhard, Jeffrey M. Scherer | 2015-04-14 |
| 8754691 | Memory array pulse width control | Derick G. Behrends, Travis R. Hebig | 2014-06-17 |
| 8725622 | System and method for conducting electronic auctions with multi-parameter optimal bidding | Virind Gujral, Tim Jackovic, Greg S. Anderson, Dan V. Pedersen, William D. Rupp | 2014-05-13 |
| 8659937 | Implementing low power write disabled local evaluation for SRAM | Sharon H. Cesky, Elizabeth L. Gerhard, Jeffrey M. Scherer | 2014-02-25 |
| 8593890 | Implementing supply and source write assist for SRAM arrays | Sharon H. Cesky, Elizabeth L. Gerhard, Jeffrey M. Scherer | 2013-11-26 |
| 8451668 | Implementing column redundancy steering for memories with wordline repowering | Travis R. Hebig | 2013-05-28 |
| 8331180 | Active bit line droop for read assist | Sharon H. Cesky, Elizabeth L. Gerhard, Jeffrey M. Scherer | 2012-12-11 |
| 8279687 | Single supply sub VDD bit-line precharge SRAM and method for level shifting | George M. Braceras, Daniel Mark Nelson, Harold Pilo, Vinod Ramadurai | 2012-10-02 |
| 8274848 | Level shifter for use with memory arrays | Sharon H. Cesky, Elizabeth L. Gerhard, Jeffrey M. Scherer | 2012-09-25 |
| 8233342 | Apparatus and method for implementing write assist for static random access memory arrays | George M. Braceras, Harold Pilo, Fred J. Towler | 2012-07-31 |
| 8213249 | Implementing low power data predicting local evaluation for double pumped arrays | Sharon H. Cesky, Elizabeth L. Gerhard, Jeffrey M. Scherer | 2012-07-03 |
| 8108739 | High-speed testing of integrated devices | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig | 2012-01-31 |
| 7983080 | Non-body contacted sense amplifier with negligible history effect | Sharon H. Cesky, Elizabeth L. Gerhard, Jeffrey M. Scherer | 2011-07-19 |
| 7860172 | Self clock generation structure for low power local clock buffering decoder | Toru Asano, Andrew Maust | 2010-12-28 |
| 7835176 | Implementing enhanced dual mode SRAM performance screen ring oscillator | Todd A. Christensen, Peter Thomas Freiburger, Travis R. Hebig | 2010-11-16 |
| 7827018 | Method and computer program for selecting circuit repairs using redundant elements with consideration of aging effects | Rajiv V. Joshi, Rouwaida N. Kanj, Sani R. Nassif | 2010-11-02 |