Issued Patents All Time
Showing 25 most recent of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10311966 | On-chip diagnostic circuitry monitoring multiple cycles of signal samples | Anthony Gus Aipperspach, Todd A. Christensen, Jeffrey M. Scherer | 2019-06-04 |
| 9715905 | Detecting maximum voltage between multiple power supplies for memory testing | Anthony Gus Aipperspach, Todd A. Christensen, Jeffrey M. Scherer | 2017-07-25 |
| 9583938 | Electrostatic discharge protection device with power management | Anthony Gus Aipperspach, Todd A. Christensen, David W. Siljenberg | 2017-02-28 |
| 9496712 | Electrostatic discharge protection device with power management | Anthony Gus Aipperspach, Todd A. Christensen, David W. Siljenberg | 2016-11-15 |
| 9424389 | Implementing enhanced performance dynamic evaluation circuit by combining precharge and delayed keeper | Anthony Gus Aipperspach, Todd A. Christensen, Jesse D. Smith | 2016-08-23 |
| 9396303 | Implementing enhanced performance dynamic evaluation circuit by combining precharge and delayed keeper | Anthony Gus Aipperspach, Todd A. Christensen, Jesse D. Smith | 2016-07-19 |
| 9312858 | Level shifter for a time-varying input | Todd A. Christensen, Travis R. Hebig, Michael Launsbach | 2016-04-12 |
| 9287873 | Level shifter for a time-varying input | Todd A. Christensen, Travis R. Hebig, Michael Launsbach | 2016-03-15 |
| 9218880 | Partial update in a ternary content addressable memory | Igor Arsovski, Todd A. Christensen, Travis R. Hebig, Michael Launsbach | 2015-12-22 |
| 9196671 | Integrated decoupling capacitor utilizing through-silicon via | Todd A. Christensen, Travis R. Hebig, Michael Launsbach, John E. Sheets, II | 2015-11-24 |
| 9153638 | Integrated decoupling capacitor utilizing through-silicon via | Todd A. Christensen, Travis R. Hebig, Michael Launsbach, John E. Sheets, II | 2015-10-06 |
| 9142560 | Layout to minimize FET variation in small dimension photolithography | Todd A. Christensen, Travis R. Hebig, Michael Launsbach, Daniel Mark Nelson | 2015-09-22 |
| 9082484 | Partial update in a ternary content addressable memory | Igor Arsovski, Todd A. Christensen, Travis R. Hebig, Michael Launsbach | 2015-07-14 |
| 9058861 | Power management SRAM write bit line drive circuit | Todd A. Christensen, Travis R. Hebig, Michael Launsbach | 2015-06-16 |
| 8860141 | Layout to minimize FET variation in small dimension photolithography | Todd A. Christensen, Travis R. Hebig, Michael Launsbach, Daniel Mark Nelson | 2014-10-14 |
| 8842487 | Power management domino SRAM bit line discharge circuit | Todd A. Christensen, Travis R. Hebig, Michael Launsbach | 2014-09-23 |
| 8824196 | Single cycle data copy for two-port SRAM | Todd A. Christensen, Travis R. Hebig, Michael Launsbach, Daniel Mark Nelson | 2014-09-02 |
| 8754691 | Memory array pulse width control | Chad A. Adams, Travis R. Hebig | 2014-06-17 |
| 8711606 | Data security for dynamic random access memory using body bias to clear data at power-up | Todd A. Christensen, Travis R. Hebig, Michael Launsbach, Daniel Mark Nelson | 2014-04-29 |
| 8675427 | Implementing RC and coupling delay correction for SRAM | Todd A. Christensen, Travis R. Hebig, Michael Launsbach, Daniel Mark Nelson | 2014-03-18 |
| 8669800 | Implementing power saving self powering down latch structure | Todd A. Christensen, Travis R. Hebig, Michael Launsbach | 2014-03-11 |
| 8578304 | Implementing mulitple mask lithography timing variation mitigation | Todd A. Christensen, Travis R. Hebig, Michael Launsbach | 2013-11-05 |
| 8520429 | Data dependent SRAM write assist | Todd A. Christensen, Travis R. Hebig, Michael Launsbach, Daniel Mark Nelson | 2013-08-27 |
| 8467230 | Data security for dynamic random access memory using body bias to clear data at power-up | Todd A. Christensen, Travis R. Hebig, Michael Launsbach, Daniel Mark Nelson | 2013-06-18 |
| 8427894 | Implementing single bit redundancy for dynamic SRAM circuit with any bit decode | Todd A. Christensen, Peter Thomas Freiburger, Travis R. Hebig, Jayson K. Wittrup | 2013-04-23 |