Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9312858 | Level shifter for a time-varying input | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig | 2016-04-12 |
| 9287873 | Level shifter for a time-varying input | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig | 2016-03-15 |
| 9218880 | Partial update in a ternary content addressable memory | Igor Arsovski, Derick G. Behrends, Todd A. Christensen, Travis R. Hebig | 2015-12-22 |
| 9196671 | Integrated decoupling capacitor utilizing through-silicon via | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, John E. Sheets, II | 2015-11-24 |
| 9153638 | Integrated decoupling capacitor utilizing through-silicon via | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, John E. Sheets, II | 2015-10-06 |
| 9142560 | Layout to minimize FET variation in small dimension photolithography | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Daniel Mark Nelson | 2015-09-22 |
| 9082484 | Partial update in a ternary content addressable memory | Igor Arsovski, Derick G. Behrends, Todd A. Christensen, Travis R. Hebig | 2015-07-14 |
| 9058861 | Power management SRAM write bit line drive circuit | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig | 2015-06-16 |
| 8860141 | Layout to minimize FET variation in small dimension photolithography | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Daniel Mark Nelson | 2014-10-14 |
| 8842487 | Power management domino SRAM bit line discharge circuit | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig | 2014-09-23 |
| 8824196 | Single cycle data copy for two-port SRAM | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Daniel Mark Nelson | 2014-09-02 |
| 8711606 | Data security for dynamic random access memory using body bias to clear data at power-up | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Daniel Mark Nelson | 2014-04-29 |
| 8675427 | Implementing RC and coupling delay correction for SRAM | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Daniel Mark Nelson | 2014-03-18 |
| 8669800 | Implementing power saving self powering down latch structure | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig | 2014-03-11 |
| 8578304 | Implementing mulitple mask lithography timing variation mitigation | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig | 2013-11-05 |
| 8520429 | Data dependent SRAM write assist | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Daniel Mark Nelson | 2013-08-27 |
| 8467230 | Data security for dynamic random access memory using body bias to clear data at power-up | Derick G. Behrends, Todd A. Christensen, Travis R. Hebig, Daniel Mark Nelson | 2013-06-18 |
| 8241560 | Nickel base superalloy and single crystal castings | John Corrigan, John R. Mihalisin | 2012-08-14 |
| 6944099 | Precise time period measurement | Curtis Walter Preuss | 2005-09-13 |
| 6933743 | Dual mode analog differential and CMOS logic circuit | Delbert R. Cecchi, Curtis Walter Preuss, David W. Siljenberg | 2005-08-23 |
| 6120624 | Nickel base superalloy preweld heat treatment | Russell G. Vogt, John Corrigan | 2000-09-19 |