Issued Patents All Time
Showing 176–200 of 358 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9612969 | Demote instruction for relinquishing cache line ownership | Kathryn Marie Jackson, Charles F. Webb | 2017-04-04 |
| 9600287 | Latent modification instruction for transactional execution | Michael K. Gschwind, Valentina Salapura, Timothy J. Slegel | 2017-03-21 |
| 9600286 | Latent modification instruction for transactional execution | Michael K. Gschwind, Valentina Salapura, Timothy J. Slegel | 2017-03-21 |
| 9582315 | Software enabled and disabled coalescing of memory transactions | Fadi Y. Busaba, Michael K. Gschwind, Valentina Salapura | 2017-02-28 |
| 9569338 | Fingerprint-initiated trace extraction | Jonathan D. Bradbury, Giles R. Frazier, Michael K. Gschwind, Christian Jacobi, Anthony Saporito | 2017-02-14 |
| 9563468 | Interprocessor memory status communication | Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Timothy J. Slegel | 2017-02-07 |
| 9563467 | Interprocessor memory status communication | Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Timothy J. Slegel | 2017-02-07 |
| 9552278 | Configurable code fingerprint | Giles R. Frazier, Michael K. Gschwind, Christian Jacobi | 2017-01-24 |
| 9547595 | Salvaging lock elision transactions | Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael | 2017-01-17 |
| 9547484 | Automated compiler operation verification | Giles R. Frazier, Michael K. Gschwind, Christian Jacobi, Anthony Saporito, Joran S. C. Siu | 2017-01-17 |
| 9535696 | Instruction to cancel outstanding cache prefetches | Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz | 2017-01-03 |
| 9524257 | Transactional execution enabled supervisor call interruption while in TX mode | Jonathan D. Bradbury, Dan F. Greiner, Michael K. Gschwind | 2016-12-20 |
| 9524205 | Code fingerprint-based processor malfunction detection | Giles R. Frazier, Michael K. Gschwind, Christian Jacobi, Anthony Saporito | 2016-12-20 |
| 9524196 | Adaptive process for data sharing with selection of lock elision and locking | Michael K. Gschwind, Maged M. Michael, Valentina Salapura | 2016-12-20 |
| 9524195 | Adaptive process for data sharing with selection of lock elision and locking | Michael K. Gschwind, Maged M. Michael, Valentina Salapura | 2016-12-20 |
| 9524188 | Multithreaded transactions | Fadi Y. Busaba, Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz | 2016-12-20 |
| 9524187 | Executing instruction with threshold indicating nearing of completion of transaction | Jonathan D. Bradbury, Dan F. Greiner, Michael K. Gschwind, Maged M. Michael | 2016-12-20 |
| 9519485 | Confidence threshold-based opposing branch path execution for branch prediction | Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Brian R. Prasky | 2016-12-13 |
| 9514048 | Inducing transactional aborts in other processing threads | Fadi Y. Busaba, Valentina Salapura | 2016-12-06 |
| 9513960 | Inducing transactional aborts in other processing threads | Fadi Y. Busaba, Valentina Salapura | 2016-12-06 |
| 9507717 | Multithreaded transactions | Fadi Y. Busaba, Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz | 2016-11-29 |
| 9501416 | Demote instruction for relinquishing cache line ownership | Kathryn Marie Jackson, Charles F. Webb | 2016-11-22 |
| 9501323 | Management of resources within a computing environment | Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Brian R. Prasky | 2016-11-22 |
| 9501232 | Transactional memory operations with write-only atomicity | Michael K. Gschwind, Timothy J. Slegel | 2016-11-22 |
| 9495306 | Dynamic management of a processor state with transient cache memory | Jonathan D. Bradbury, Dan F. Greiner, Michael K. Gschwind, Christian Jacobi, Younes Manton +3 more | 2016-11-15 |