Issued Patents All Time
Showing 26–50 of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7537018 | Method and apparatus for controlling partial vapor pressure in a sorption analyzer | Eric Pilacek | 2009-05-26 |
| 7509365 | Inverting data on result bus to prepare for instruction in the next cycle for high frequency execution units | Ashutosh Goyal, Michael Thomas Vaden, David A. Webber | 2009-03-24 |
| 7243170 | Method and circuit for reading and writing an instruction buffer | Taqi Nasser Buti, Maureen A. Delaney, Saiful Islam, Zakaria Mahmood Khwaja, Jafar Nahidi +1 more | 2007-07-10 |
| 7237094 | Instruction group formation and mechanism for SMT dispatch | Brian R. Konigsburg, Hung Q. Le, David Arnold Luick, Dung Q. Nguyen | 2007-06-26 |
| 6966046 | CMOS tapered gate and synthesis method | Lisa Bryant Lacey, Gregory A. Northrop, Ruchir Puri, Leon Stok | 2005-11-15 |
| 6882205 | Low power overdriven pass gate latch | Edward T. Malley | 2005-04-19 |
| 6816824 | Method for statically timing SOI devices and circuits | Ching-Te Chuang, George E. Smith, III | 2004-11-09 |
| 6768365 | Low power reduced voltage swing latch | Edward T. Malley | 2004-07-27 |
| 6661262 | Frequency doubling two-phase clock generation circuit | — | 2003-12-09 |
| 6657471 | High performance, low power differential latch | Edward T. Malley | 2003-12-02 |
| 6426661 | Clock distribution with constant delay clock buffer circuit | — | 2002-07-30 |
| 6104212 | Common domino circuit evaluation device | — | 2000-08-15 |
| 5939915 | Noise-immune pass gate latch | — | 1999-08-17 |
| 5771369 | Memory row redrive | — | 1998-06-23 |
| 5765207 | Recursive hardware state machine | — | 1998-06-09 |
| 5574921 | Method and apparatus for reducing bus noise and power consumption | — | 1996-11-12 |
| 5572736 | Method and apparatus for reducing bus noise and power consumption | — | 1996-11-05 |
| 5568075 | Timing signal generator | Rafael Blanco | 1996-10-22 |
| 5554946 | Timing signal generator | Rafael Blanco | 1996-09-10 |
| 5479640 | Memory access system including a memory controller with memory redrive circuitry | Frank P. Cartman, Matthew A. Krygowski, Tin-Chee Lo, Sandy N. Luu, Sanjay Patel +1 more | 1995-12-26 |
| 5428762 | Expandable memory having plural memory cards for distributively storing system data | Joseph L. Temple, III | 1995-06-27 |
| 5278967 | System for providing gapless data transfer from page-mode dynamic random access memories | — | 1994-01-11 |
| 5032985 | Multiprocessor system with memory fetch buffer invoked during cross-interrogation | Joseph D'Onofrio, Richard N. Fuqua, Robert D. Herzl, Louis J. Milich, Paul M. Moore +1 more | 1991-07-16 |
| D292998 | Games sheet | — | 1987-12-01 |
| D292999 | Games sheet | — | 1987-12-01 |