Issued Patents All Time
Showing 51–68 of 68 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8495287 | Clock-based debugging for embedded dynamic random access memory element in a processor core | Adam B. Collura, Michael Fee, Gerard M. Salem, Robert J. Sonnelitter, III | 2013-07-23 |
| 8468421 | Memory system for error checking fetch and store data | Michael Fee | 2013-06-18 |
| 8423875 | Collecting failure information on error correction code (ECC) protected data | Patrick J. Meaney | 2013-04-16 |
| 8392621 | Managing dataflow in a temporary memory | Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael Fee, Diana L. Orf, Robert J. Sonnelitter, III | 2013-03-05 |
| 8365055 | High performance cache directory error correction code | Ekaterina M. Ambroladze, Patrick J. Meaney | 2013-01-29 |
| 8364899 | User-controlled targeted cache purge | Ekaterina M. Ambroladze, Patrick J. Meaney | 2013-01-29 |
| 8352687 | Performance optimization and dynamic resource reservation for guaranteed coherency updates in a multi-level cache hierarchy | Deanna Postles Dunn Berger, Michael Fee, Robert J. Sonnelitter, III | 2013-01-08 |
| 8327078 | Dynamic trailing edge latency absorption for fetch data forwarded from a shared data/control interface | Deanna Postles Dunn Berger, Michael Fee, Robert J. Sonnelitter, III | 2012-12-04 |
| 8327070 | Method for optimizing sequential data fetches in a computer system | Ekaterina M. Ambroladze, Michael Fee | 2012-12-04 |
| 8316284 | Collecting failure information on error correction code (ECC) protected data | Patrick J. Meaney | 2012-11-20 |
| 8250308 | Cache coherency protocol with built in avoidance for conflicting responses | Vesselina K. Papazova, Ekaterina M. Ambroladze, Michael A. Blake, Pak-kin Mak, Craig R. Waters | 2012-08-21 |
| 8244972 | Optimizing EDRAM refresh rates in a high performance cache architecture | Timothy C. Bronson, Michael Fee, Scott Barnett Swaney | 2012-08-14 |
| 8180970 | Least recently used (LRU) compartment capture in a cache memory system | Michael Fee, Pak-kin Mak | 2012-05-15 |
| 8131937 | Apparatus and method for improved data persistence within a multi-node system | Michael A. Blake, Harmony L. Helterhoff, Vesselina K. Papazova, Craig R. Walters | 2012-03-06 |
| 8001328 | Method and process for expediting the return of line exclusivity to a given processor through enhanced inter-node communications | Sebastian Burckhardt, Vesselina K. Papazova, Craig R. Walters | 2011-08-16 |
| 7934059 | Method, system and computer program product for preventing lockout and stalling conditions in a multi-node system with speculative memory fetching | Vesselina K. Papazova, Michael A. Blake, Pak-kin Mak, Craig R. Waters | 2011-04-26 |
| 7685345 | Apparatus and method for fairness arbitration for a shared pipeline in a large SMP computer system | Deanna P. Dunn, Christine C. Jones, Vesselina K. Papazova, Robert J Sonnelltier, III, Craig R. Walters | 2010-03-23 |
| 7502986 | Method and apparatus for collecting failure information on error correction code (ECC) protected data | Patrick J. Meaney | 2009-03-10 |