Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10453747 | Double barrier layer sets for contacts in semiconductor device | Aditya Kumar, Shiv Kumar Mishra, Jean-Baptiste Laloe | 2019-10-22 |
| 9419101 | Multi-layer spacer used in finFET | Jianwei Peng, Hong Yu, Zhao Lun, Tao Han, Hsien-Ching Lo +2 more | 2016-08-16 |
| 8178417 | Method of forming shallow trench isolation structures for integrated circuits | Shailendra Mishra, James Yong Meng Lee, Zhao Lun, Chung Woh Lai, Huang Liu +2 more | 2012-05-15 |
| 8143651 | Nested and isolated transistors with reduced impedance difference | Johnny Widodo, Liang-Choo Hsia, James Yong Meng Lee, Zhao Lun, Huang Liu +5 more | 2012-03-27 |
| 7767577 | Nested and isolated transistors with reduced impedance difference | Johnny Widodo, Liang-Choo Hsia, James Yong Meng Lee, Zhao Lun, Huang Liu +5 more | 2010-08-03 |