Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10109492 | Method of forming a high quality interfacial layer for a semiconductor device by performing a low temperature ALD process | Gabriela Dilliway, Dina H. Triyoso, Rimoon Agaiby | 2018-10-23 |
| 10079242 | Logic and flash field-effect transistors | Ralf Richter, Thomas Melde | 2018-09-18 |
| 9236440 | Sandwich silicidation for fully silicided gate formation | Roman Boschke, Stefan Flachowsky | 2016-01-12 |
| 8791003 | Methods for fabricating integrated circuits with fluorine passivation | Dina H. Triyoso, Robert Binder | 2014-07-29 |
| 8658490 | Passivating point defects in high-K gate dielectric layers during gate stack formation | Martin Trentzsch, Richard J. Carter | 2014-02-25 |
| 8652890 | Methods for fabricating integrated circuits with narrow, metal filled openings | Sven Schmidbauer, Dina H. Triyoso, Hao Zhang, Robert Binder | 2014-02-18 |
| 8420519 | Methods for fabricating integrated circuits with controlled P-channel threshold voltage | Dina H. Triyoso, Klaus Hempel | 2013-04-16 |
| 7666752 | Deposition method for a transition-metal-containing dielectric | Stephan Kudelka, Lars Oberbeck, Uwe Schroeder, Tim Boescke, Johannes Heitmann +2 more | 2010-02-23 |
| 7531405 | Method of manufacturing a dielectric layer and corresponding semiconductor device | Andreas Spitzer | 2009-05-12 |