Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
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Brian A. Winstead — 49 Patents

FSFreeescale Semiconductor: 47 patents #18 of 3,767Top 1%
NUNxp Usa: 1 patents #1,089 of 2,066Top 55%
Texas: #1,774 of 125,132 inventorsTop 2%
Overall (All Time): #56,729 of 4,157,543Top 2%
49 Patents All Time

Issued Patents All Time

Showing 26–49 of 49 patents

Patent #TitleCo-InventorsDate
8163615 Split-gate non-volatile memory cell having improved overlap tolerance and method therefor Ted R. White, Gowrishankar L. Chindalore 2012-04-24
8048738 Method for forming a split gate device Sung-Taeg Kang, Cheong Min Hong 2011-11-01
8035156 Split-gate non-volatile memory cell and method Gowrishankar L. Chindalore, Konstantin V. Loiko, Horacio P. Gasquet 2011-10-11
7985649 Method of making a semiconductor structure useful in making a split gate non-volatile memory cell Cheong Min Hong, Sung-Taeg Kang, Konstantin V. Loiko, Spencer E. Williams 2011-07-26
7960267 Method for making a stressed non-volatile memory device Konstantin V. Loiko, Taras A. Kirichenko 2011-06-14
7960243 Method of forming a semiconductor device featuring a gate stressor and semiconductor device Konstantin V. Loiko, Voon-Yew Thean 2011-06-14
7957190 Memory having P-type split gate memory cells and method of operation Cheong Min Hong, Sung-Taeg Kang 2011-06-07
7923769 Split gate non-volatile memory cell with improved endurance and method therefor Ted R. White 2011-04-12
7923328 Split gate non-volatile memory cell with improved endurance and method therefor Ted R. White 2011-04-12
7833852 Source/drain stressors formed using in-situ epitaxial growth Vishal P. Trivedi, Da Zhang 2010-11-16
7821055 Stressed semiconductor device and method for making Konstantin V. Loiko, Cheong Min Hong, Sung-Taeg Kang, Taras A. Kirichenko 2010-10-26
7811886 Split-gate thin film storage NVM cell with reduced load-up/trap-up effects Taras A. Kirichenko, Konstantin V. Loiko, Ramachandran Muralidhar, Rajesh A. Rao, Sung-Taeg Kang +2 more 2010-10-12
7799644 Transistor with asymmetry for data storage circuitry Ted R. White, James D. Burnett 2010-09-21
7795091 Method of forming a split gate memory device and apparatus Rajesh A. Rao, Spencer E. Williams 2010-09-14
7714318 Electronic device including a transistor structure having an active region adjacent to a stressor layer Vance H. Adams, Paul A. Grudowski, Venkat R. Kolagunta 2010-05-11
7608898 One transistor DRAM cell structure James D. Burnett 2009-10-27
7572706 Source/drain stressor and method therefor Da Zhang 2009-08-11
7488635 Semiconductor structure with reduced gate doping and methods for forming thereof James D. Burnett, Sinan Goktepeli 2009-02-10
7479422 Semiconductor device with stressors and method therefor Ted R. White, Da Zhang 2009-01-20
7468313 Engineering strain in thick strained-SOI substrates Voon-Yew Thean, Victor H. Vartanian 2008-12-23
7435639 Dual surface SOI by lateral epitaxial overgrowth Omar Zia, Mariam Sadaka, Marius Orlowski 2008-10-14
7420202 Electronic device including a transistor structure having an active region adjacent to a stressor layer and a process for forming the electronic device Vance H. Adams, Paul A. Grudowski, Venkat R. Kolagunta 2008-09-02
7414877 Electronic device including a static-random-access memory cell and a process of forming the electronic device James D. Burnett, Bich-Yen Nguyen 2008-08-19
7166897 Method and apparatus for performance enhancement in an asymmetrical semiconductor device Marius Orlowski, Vance H. Adams, Chun-Li Liu 2007-01-23