Issued Patents All Time
Showing 101–125 of 173 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8643124 | Oxide-nitride-oxide stack having multiple oxynitride layers | Sagy Levy, Fredrick B. Jenne, Sam Geha | 2014-02-04 |
| 8637921 | Nitridation oxidation of tunneling layer for improved SONOS speed and retention | Sagy Levy, Fredrick B. Jenne | 2014-01-28 |
| 8633537 | Memory transistor with multiple charge storing layers and a high work function gate electrode | Igor Polishchuk, Sagy Levy | 2014-01-21 |
| 8592891 | Methods for fabricating semiconductor memory with process induced strain | Igor Polishchuk, Sagy Levy, Jeong Soo Byun | 2013-11-26 |
| 8536640 | Deuterated film encapsulation of nonvolatile charge trap memory device | Fredrick B. Jenne, William Koutny | 2013-09-17 |
| 8445381 | Oxide-nitride stack gate dielectric | Sundar Narayanan | 2013-05-21 |
| 8318608 | Method of fabricating a nonvolatile charge trap memory device | Sagy Levy, Jeong Soo Byun | 2012-11-27 |
| 8283261 | Radical oxidation process for fabricating a nonvolatile charge trap memory device | — | 2012-10-09 |
| 8222688 | SONOS stack with split nitride memory layer | Fredrick B. Jenne | 2012-07-17 |
| 8143129 | Integration of non-volatile charge trap memory devices and logic CMOS devices | Ravindra M. Kapre, Jeremy B. Warren | 2012-03-27 |
| 8119538 | Oxide formation in a plasma process | Jeong Soo Byun | 2012-02-21 |
| 8093128 | Integration of non-volatile charge trap memory devices and logic CMOS devices | William Koutny, Sam Geha, Igor G. Kouznetsov, Fredrick B. Jenne, Sagy Levy +2 more | 2012-01-10 |
| 8088683 | Sequential deposition and anneal of a dielectic layer in a charge trapping memory device | Sagy Levy | 2012-01-03 |
| 8080453 | Gate stack having nitride layer | Alain Blosse | 2011-12-20 |
| 8071453 | Method of ONO integration into MOS flow | Bo Jin, Fredrick B. Jenne | 2011-12-06 |
| 8063434 | Memory transistor with multiple charge storing layers and a high work function gate electrode | Igor Polishchuk, Sagy Levy | 2011-11-22 |
| 7898852 | Trapped-charge non-volatile memory with uniform multilevel programming | Sagy Levy, Peter Voss | 2011-03-01 |
| 7880219 | Nonvolatile charge trap memory device having <100> crystal plane channel orientation | Igor Polishchuk, Sagy Levy | 2011-02-01 |
| 7867918 | Semiconductor topography including a thin oxide-nitride stack and method for making the same | — | 2011-01-11 |
| 7799670 | Plasma oxidation of a memory layer to form a blocking layer in non-volatile charge trap memory devices | Sagy Levy, Jeong Soo Byun | 2010-09-21 |
| 7670963 | Single-wafer process for fabricating a nonvolatile charge trap memory device | Sagy Levy | 2010-03-02 |
| 7629653 | Techniques for improving negative bias temperature instability (NBTI) lifetime of field effect transistors | Sharmin Sadoughi, Ravindra M. Kapre, Igor Polishchuk, Maroun Georges Khoury | 2009-12-08 |
| 7396773 | Method for cleaning a gate stack | Alain Blosse | 2008-07-08 |
| 7390750 | Method of patterning elements within a semiconductor topography | Alain Blosse, James Hunter | 2008-06-24 |
| 7384833 | Stress liner for integrated circuits | Igor Polishchuk, Sagy Levy | 2008-06-10 |