SG

Sam Geha

Cypress Semiconductor: 17 patents #93 of 1,852Top 6%
LS Longitude Flash Memory Solutions: 7 patents #4 of 26Top 20%
UA University Of Arizona: 1 patents #534 of 1,318Top 45%
SS Silicon Magnetic Systems: 1 patents #12 of 20Top 60%
Overall (All Time): #149,875 of 4,157,543Top 4%
26
Patents All Time

Issued Patents All Time

Showing 25 most recent of 26 patents

Patent #TitleCo-InventorsDate
12266521 Oxide-nitride-oxide stack having multiple oxynitride layers Sagy Levy, Krishnaswamy Ramkumar, Fredrick B. Jenne 2025-04-01
11784243 Oxide-nitride-oxide stack having multiple oxynitride layers Sagy Levy, Krishnaswamy Ramkumar, Fredrick B. Jenne 2023-10-10
11222965 Oxide-nitride-oxide stack having multiple oxynitride layers Sagy Levy, Krishnaswamy Ramkumar, Fredrick B. Jenne 2022-01-11
10903068 Oxide-nitride-oxide stack having multiple oxynitride layers Sagy Levy, Krishnaswamy Ramkumar, Fredrick B. Jenne 2021-01-26
10903342 Oxide-nitride-oxide stack having multiple oxynitride layers Sagy Levy, Krishnaswamy Ramkumar, Fredrick B. Jenne 2021-01-26
10896973 Oxide-nitride-oxide stack having multiple oxynitride layers Sagy Levy, Krishnaswamy Ramkumar, Fredrick B. Jenne 2021-01-19
10374067 Oxide-nitride-oxide stack having multiple oxynitride layers Sagy Levy, Krishnaswamy Ramkumar, Fredrick B. Jenne 2019-08-06
9449831 Oxide-nitride-oxide stack having multiple oxynitride layers Sagy Levy, Krishnaswamy Ramkumar, Fredrick B. Jenne 2016-09-20
9355849 Oxide-nitride-oxide stack having multiple oxynitride layers Sagy Levy, Krishnaswamy Ramkumar, Fredrick B. Jenne 2016-05-31
9349824 Oxide-nitride-oxide stack having multiple oxynitride layers Sagy Levy, Krishnaswamy Ramkumar, Frederick B. Jenne 2016-05-24
8643124 Oxide-nitride-oxide stack having multiple oxynitride layers Sagy Levy, Krishnaswamy Ramkumar, Fredrick B. Jenne 2014-02-04
8093128 Integration of non-volatile charge trap memory devices and logic CMOS devices William Koutny, Igor G. Kouznetsov, Krishnaswamy Ramkumar, Fredrick B. Jenne, Sagy Levy +2 more 2012-01-10
7205164 Methods for fabricating magnetic cell junctions and a structure resulting and/or used for such methods Benjamin Schwarz, Chang Ju Choi, Biju Parameshwaran, Eugene Chen, Helen L. Chung +2 more 2007-04-17
6803318 Method of forming self aligned contacts Jianmin Qiao, Mehran Sedigh 2004-10-12
6756302 Low temperature metallization process Ende Shan, Gorley Lau 2004-06-29
6756315 Method of forming contact openings Hanna Bamnolker, Prashant B. Phatak, Usha Raghuram 2004-06-29
6693042 Method for etching a dielectric layer formed upon a barrier layer Mehran Sedigh, Jianmin Qiao 2004-02-17
6627547 Hot metallization process 2003-09-30
6534398 Method of forming metal layer(s) and/or antireflective coating layer(s) on an integrated circuit Ende Shan, Gorley Lau 2003-03-18
6309971 Hot metallization process 2001-10-30
6187667 Method of forming metal layer(s) and/or antireflective coating layer(s) on an integrated circuit Ende Shan, Gorley Lau 2001-02-13
6156645 Method of forming a metal layer on a substrate, including formation of wetting layer at a high temperature Ende Shan 2000-12-05
6140228 Low temperature metallization process Ende Shan, Gorley Lau 2000-10-31
5977638 Edge metal for interconnect layers T. J. Rodgers, Chris Petti, Ting-Pwu Yen 1999-11-02
5968851 Controlled isotropic etch process and method of forming an opening in a dielectric layer Ende Shan 1999-10-19