Issued Patents All Time
Showing 51–62 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10096694 | Process for fabricating a vertical-channel nanolayer transistor | Remi Coquand, Emmanuel Augendre | 2018-10-09 |
| 10014183 | Method for patterning a thin film | Laurent Grenouillet, Yves Morand | 2018-07-03 |
| 9966453 | Method for doping source and drain regions of a transistor by means of selective amorphisation | Perrine Batude, Frédéric Mazen, Benoit Sklenard | 2018-05-08 |
| 9935019 | Method of fabricating a transistor channel structure with uniaxial strain | Laurent Grenouillet, Frederic Milesi, Yves Morand, Francois Rieutord | 2018-04-03 |
| 9899217 | Method for producing a strained semiconductor on insulator substrate | Yves Morand, Hubert Moriceau | 2018-02-20 |
| 9876121 | Method for making a transistor in a stack of superimposed semiconductor layers | Sylvain Barraud, Maud Vinet | 2018-01-23 |
| 9761607 | Method for producing strained semi-conductor blocks on the insulating layer of a semi-conductor on insulator substrate | Perrine Batude, Sylvain Maitrejean, Frédéric Mazen | 2017-09-12 |
| 9704709 | Method for causing tensile strain in a semiconductor film | Emmanuel Augendre, Aomar Halimaoui, Sylvain Maitrejean | 2017-07-11 |
| 9502558 | Local strain generation in an SOI substrate | Laurent Grenouillet, Cyrille Le Royer, Sylvain Maitrejean, Yves Morand | 2016-11-22 |
| 9431538 | Enhanced method of introducing a stress in a transistor channel by means of sacrificial sources/drain regions and gate replacement | Pierre Morin | 2016-08-30 |
| 9343375 | Method for manufacturing a transistor in which the strain applied to the channel is increased | Perrine Batude, Frédéric Mazen, Benoit Sklenard | 2016-05-17 |
| 9246006 | Recrystallization of source and drain blocks from above | Perrine Batude, Frédéric Mazen, Benoit Sklenard | 2016-01-26 |