Issued Patents All Time
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9263151 | Memory interface with selectable evaluation modes | Thucydides Xanthopoulos | 2016-02-16 |
| 9143140 | Multi-function delay locked loop | Suresh Balasubramanian | 2015-09-22 |
| 9087567 | Method and apparatus for amplifier offset calibration | Omer O. Yildirim, Scott E. Meninger | 2015-07-21 |
| 8896360 | Level-up shifter circuit for high speed and low power applications | — | 2014-11-25 |
| 8525572 | Level-up shifter circuit | — | 2013-09-03 |
| 7227384 | Scan friendly domino exit and domino entry sequential circuits | Mondira Pant, Paul Gronowski, Randy L. Allmon, Manjunath Bhat | 2007-06-05 |
| 6830941 | Method and apparatus for identifying individual die during failure analysis | Chern-Jiann Lee, Boon Yong Ang, Mehrdad Mahanpour | 2004-12-14 |
| 6596553 | Method of pinhole decoration and detection | Scott A. Bell, Philip A. Fisher, Srikanteswara Dakshina-Murthy | 2003-07-22 |
| 5423019 | Automatic cache flush with readable and writable cache tag memory | — | 1995-06-06 |