Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10848134 | Latch with redundancy and circuitry to protect against a soft error | Balkaran Gill, Norbert Seifert, Shah M. Jahinuzzaman | 2020-11-24 |
| 9104474 | Variable precision floating point multiply-add circuit | Himanshu Kaul, Mark A. Anders, Sanu K. Mathew, Ram Krishnamurthy, William C. Hasenplaugh +1 more | 2015-08-11 |
| 8278692 | Soft error reduction circuit and method | Vinod Ambrose, Jeffrey D. Pickholtz | 2012-10-02 |
| 7227384 | Scan friendly domino exit and domino entry sequential circuits | Mondira Pant, Paul Gronowski, Manjunath Bhat, David Lin | 2007-06-05 |
| 6653869 | Universal CMOS single input, low swing sense amplifier without reference voltage | Robert J. Dupcak, Mark D. Matson | 2003-11-25 |
| 6414520 | Universal CMOS single input, low swing sense amplifier without reference voltage | Robert J. Dupcak, Mark D. Matson | 2002-07-02 |
| 6201418 | Differential sense amplifier with reduced hold time | — | 2001-03-13 |
| 5317527 | Leading one/zero bit detector for floating point operation | Sharon Marie Britton, Sridhar Samudrala | 1994-05-31 |