Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6675288 | Apparatus for mapping instructions using a set of valid and invalid logical to physical register assignments indicated by bits of a valid vector together with a logical register list | James Arthur Farrell, Harry Ray Fair, III, Bruce Gieseke, Daniel Leibholz, Derrick R. Meyer | 2004-01-06 |
| 6405304 | Method for mapping instructions using a set of valid and invalid logical to physical register assignments indicated by bits of a valid vector together with a logical register list | James Arthur Farrell, Harry Ray Fair, III, Bruce Gieseke, Daniel Leibholz, Derrick R. Meyer | 2002-06-11 |
| 6122728 | Technique for ordering internal processor register accesses | Daniel Leibholz, James Arthur Farrell, Timothy C. Fischer | 2000-09-19 |
| 5317527 | Leading one/zero bit detector for floating point operation | Randy L. Allmon, Sridhar Samudrala | 1994-05-31 |