Issued Patents All Time
Showing 26–50 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7296167 | Combined system responses in a chip multiprocessor | — | 2007-11-13 |
| 7274692 | Method and apparatus for routing packets that have multiple destinations | — | 2007-09-25 |
| 7263457 | System and method for operating components of an integrated circuit at independent frequencies and/or voltages | Scott White, Philip E. Madrid | 2007-08-28 |
| 7221678 | Method and apparatus for routing packets | — | 2007-05-22 |
| 7210009 | Computer system employing a trusted execution environment including a memory controller configured to clear memory | Dale E. Gulick, Geoffrey S. Strongin | 2007-04-24 |
| 7174467 | Message based power management in a multi-processor system | Frank P. Helms, Dale E. Gulick, Larry D. Hewitt, Paul C. Miranda, Derrick R. Meyer +2 more | 2007-02-06 |
| 7165132 | Processing node including a plurality of processor cores and an interconnect configurable in a test-mode to cause first and second transaction source indicators to be interchanged | Creigton S. Asato, Kevin J. McGrath, Vydhyanathan Kalyanasundharam | 2007-01-16 |
| 7155572 | Method and apparatus for injecting write data into a cache | Patrick Conway | 2006-12-26 |
| 7146510 | Use of a signal line to adjust width and/or frequency of a communication link during system operation | Frank P. Helms, Derrick R. Meyer, Larry D. Hewitt, Dale E. Gulick, Scott E. Swanstrom | 2006-12-05 |
| 7146477 | Mechanism for selectively blocking peripheral device accesses to system memory | Geoffrey S. Strongin, David S. Christie, Kevin J. McGrath | 2006-12-05 |
| 7107367 | Method for efficient buffer tag allocation | — | 2006-09-12 |
| 7073133 | Objects and methods for accessing a data source and enhancing an application | Betty J. Hughes | 2006-07-04 |
| 7058791 | Establishing a mode indication responsive to two or more indications | Kevin J. McGrath | 2006-06-06 |
| 7051218 | Message based power management | Dale E. Gulick, Frank P. Helms, Larry D. Hewitt, Paul C. Miranda, Derrick R. Meyer +2 more | 2006-05-23 |
| 7043679 | Piggybacking of ECC corrections behind loads | Chetana N. Keltcher, Andrew McBride | 2006-05-09 |
| 7009618 | Integrated I/O Remapping mechanism | Richard Brunner | 2006-03-07 |
| 6973543 | Partial directory cache for reducing probe traffic in multiprocessor systems | — | 2005-12-06 |
| 6934903 | Using microcode to correct ECC errors in a processor | Chetana N. Keltcher, Michael T. Clark, Bruce R. Holloway | 2005-08-23 |
| 6757793 | Reducing probe traffic in multiprocessor systems using a victim record table | Yinong Zhang | 2004-06-29 |
| 6718444 | Read-modify-write for partial writes in a memory controller | — | 2004-04-06 |
| 6715055 | Apparatus and method for allocating buffer space | — | 2004-03-30 |
| 6665788 | Reducing latency for a relocation cache lookup and address mapping in a distributed memory system | — | 2003-12-16 |
| 6662280 | Store buffer which forwards data based on index and optional way match | — | 2003-12-09 |
| 6571318 | Stride based prefetcher with confidence counter and dynamic prefetch-ahead mechanism | Benjamin T. Sander, Sridhar Subramanian, Teik-Chung Tan | 2003-05-27 |
| 6549990 | Store to load forwarding using a dependency link file | Derrick R. Meyer | 2003-04-15 |