Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Matthew S. Ryskoski — 14 Patents

AMD: 12 patents #1,073 of 9,280Top 15%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
Kyle, TX: #16 of 223 inventorsTop 8%
Texas: #10,699 of 125,132 inventorsTop 9%
Overall (All Time): #332,869 of 4,157,543Top 9%
14 Patents All Time
Matthew S. Ryskoski has been granted 14 US patents while listed as an inventor at AMD. The first was granted in 2002 and the most recent in October 2011. Matthew S. Ryskoski ranks #332,869 of 4,157,543 US inventors in our database (top 8.0%). Patent records list Matthew S. Ryskoski in Kyle, TX, US.

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
8040140 Method and apparatus for identifying broken pins in a test socket Christopher Wooten, Song Han, Douglas C. Kimbrough 2011-10-18 $1,986,000
7695986 Method and apparatus for modifying process selectivities based on process state information Matthew A. Purdy, Richard J. Markle 2010-04-13 $12,774,000
7282374 Method and apparatus for comparing device and non-device structures Kevin R. Lensing 2007-10-16 $23,867,000
7277824 Method and apparatus for classifying faults based on wafer state data and sensor tool trace data Kevin R. Lensing 2007-10-02 $16,573,000
7217578 Advanced process control of thermal oxidation processes, and systems for accomplishing same Michael J. McBride, Jesse C. Ramos, Mark E. Culp, Pirainder Lall 2007-05-15 $18,237,000
7197370 Method and apparatus for dynamic adjustment of an active sensor list 2007-03-27 $8,823,000
6978187 Method and apparatus for scheduling production lots based on lot and tool health metrics 2005-12-20 $11,866,000
6868353 Method and apparatus for determining wafer quality profiles 2005-03-15 $4,259,000
6799311 Batch/lot organization based on quality characteristics 2004-09-28 $1,915,000
6721616 Method and apparatus for determining control actions based on tool health and metrology data 2004-04-13 $3,617,000
6617258 Method of forming a gate insulation layer for a semiconductor device by controlling the duration of an etch process, and system for accomplishing same Thomas J. Sonderman 2003-09-09 $4,832,000
6593227 Method and apparatus for planarizing surfaces of semiconductor device conductive layers 2003-07-15 $1,952,000
6582975 Method of controlling the deposition of inter-level dielectric layers based upon electrical performance tests, and system for accomplishing same 2003-06-24 $2,352,000
6371135 Method and apparatus for removing a particle from a surface of a semiconductor wafer 2002-04-16 $2,231,000