Issued Patents All Time
Showing 51–75 of 84 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6924216 | Semiconductor device having improved doping profiles and method of improving the doping profiles of a semiconductor device | Thomas Feudel, Rolf Stephan | 2005-08-02 |
| 6905924 | Diode structure for SOI circuits | Gert Burbach, Thomas Feudel | 2005-06-14 |
| 6881641 | Semiconductor device having a retrograde dopant profile in a channel region and method for fabricating the same | Karsten Wieczorek, Rolf Stephan | 2005-04-19 |
| 6849516 | Methods of forming drain/source extension structures of a field effect transistor using a doped high-k dielectric layer | Thomas Feudel, Karsten Wieczorek, Stephan Kruegel | 2005-02-01 |
| 6846708 | Semiconductor device having improved doping profiles and a method of improving the doping profiles of a semiconductor device | Thomas Feudel, Rolf Stephan | 2005-01-25 |
| 6838363 | Circuit element having a metal silicide region thermally stabilized by a barrier diffusion material | Karsten Wieczorek, Thorsten Kammler | 2005-01-04 |
| 6821887 | Method of forming a metal silicide gate in a standard MOS process sequence | Karsten Wieczorek, Stephan Kruegel, Thomas Feudel | 2004-11-23 |
| 6822430 | Method of assessing lateral dopant and/or charge carrier profiles | Thomas Feudel, Rolf Stephan | 2004-11-23 |
| 6812074 | SOI field effect transistor element having a recombination region and method of forming same | Karsten Wieczorek, Christian Krueger | 2004-11-02 |
| 6806153 | Method of manufacturing a field effect transistor | Karsten Wieczorek, Thomas Feudel | 2004-10-19 |
| 6798028 | Field effect transistor with reduced gate delay and method of fabricating the same | Rolf Stephan, Karsten Wieczorek, Stephan Kruegel | 2004-09-28 |
| 6770552 | Method of forming a semiconductor device having T-shaped gate structure | Karsten Wieczorek, Rolf Stephan | 2004-08-03 |
| 6754553 | Implant monitoring using multiple implanting and annealing steps | Karsten Wieczorek, Christian Krueger | 2004-06-22 |
| 6673665 | Semiconductor device having increased metal silicide portions and method of forming the semiconductor | Karsten Wieczorek, Rolf Stephan | 2004-01-06 |
| 6593175 | Method of controlling a shape of an oxide layer formed on a substrate | Thomas Feudel, Christian Krüger | 2003-07-15 |
| 6593197 | Sidewall spacer based fet alignment technology | Karsten Wieczorek, Rolf Stephan, Michael Raab | 2003-07-15 |
| 6566718 | Field effect transistor with an improved gate contact and method of fabricating the same | Karsten Wieczorek, Rolf Stephan, Stephan Kruegel | 2003-05-20 |
| 6555892 | Semiconductor device with reduced line-to-line capacitance and cross talk noise | Karsten Wieczorek, Frederick N. Hause | 2003-04-29 |
| 6541863 | Semiconductor device having a reduced signal processing time and a method of fabricating the same | Karsten Wieczorek, Gert Burbach | 2003-04-01 |
| 6492210 | Method for fully self-aligned FET technology | Karsten Wieczorek, Rolf Stephan, Michael Raab | 2002-12-10 |
| 6491799 | Method for forming a thin dielectric layer | Frederick N. Hause, Karsten Wieczorek | 2002-12-10 |
| 6436724 | Method of monitoring the temperature of a rapid thermal anneal process in semiconductor manufacturing and a test wafer for use in this method | Karsten Wieczorek, Christian Krüger | 2002-08-20 |
| 6410410 | Method of forming lightly doped regions in a semiconductor device | Thomas Feudel, Karsten Wieczorek | 2002-06-25 |
| 6358826 | Device improvement by lowering LDD resistance with new spacer/silicide process | Frederick N. Hause, Karsten Wieczorek | 2002-03-19 |
| 6352885 | Transistor having a peripherally increased gate insulation thickness and a method of fabricating the same | Karsten Wieczorek, Frederick N. Hause | 2002-03-05 |