Issued Patents All Time
Showing 26–50 of 76 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6826748 | Profiling program execution into registers of a computer | Paul H. Hohensee, David L. Reese, John S. Yates, Jr., T. R. Ramesh, Shalesh Thusoo +2 more | 2004-11-30 |
| 6789181 | Safety net paradigm for managing two computer execution modes | John S. Yates, Jr., David L. Reese, Paul H. Hohensee | 2004-09-07 |
| 6775414 | Variable-length code decoder | Chad Fogg, Nital Patwa, Parin Bhadrik Dalal, Stephen C. Purcell, Steve C. Hale | 2004-08-10 |
| 6763452 | Modifying program execution based on profiling | Paul H. Hohensee, John S. Yates, Jr., David L. Reese, Stephen C. Purcell | 2004-07-13 |
| 6745318 | Method and apparatus of configurable processing | Sanjay Mansingh, Niteen A. Patkar, Stephen C. Hale, Dee Tovey, Nital Patwa +1 more | 2004-06-01 |
| 6701426 | Switching between a plurality of branch prediction processes based on which instruction set is operational wherein branch history data structures are the same for the plurality of instruction sets | Greg L. Ries, Ronak Subhas Patel, Niteen A. Patkar, T. R. Ramesh | 2004-03-02 |
| 6671798 | Configurable branch prediction for a processor performing speculative execution | David L. Puziol, Larry Widigen, Len Shar, Walstein Bennett Smith, III | 2003-12-30 |
| 6654872 | Variable length instruction alignment device and method | T. R. Ramesh | 2003-11-25 |
| 6651159 | Floating point register stack management for CISC | Tiruvur R. Ramesh, Sanjay Mansingh | 2003-11-18 |
| 6643726 | Method of manufacture and apparatus of an integrated computing system | Niteen A. Patkar, Ali Alasti, Don A. Van Dyke, Shalesh Thusoo, Stephen C. Purcell +1 more | 2003-11-04 |
| 6578134 | Multi-branch resolution | Niteen A. Patkar, Shalesh Thusoo, TR Ramesh | 2003-06-10 |
| 6549959 | Detecting modification to computer memory by a DMA device | John S. Yates, Jr., David L. Reese | 2003-04-15 |
| 6499123 | Method and apparatus for debugging an integrated circuit | Harold L. McFarland, David R. Stiles, Shrenik Mehta, John G. Favor, Dale R. Greenley +1 more | 2002-12-24 |
| 6449671 | Method and apparatus for busing data elements | Niteen A. Patkar, Stephen C. Purcell, Shalesh Thusoo | 2002-09-10 |
| 6430646 | Method and apparatus for interfacing a processor with a bus | Shalesh Thusoo, Niteen A. Patkar, Stephen C. Purcell | 2002-08-06 |
| 6425075 | Branch prediction device with two levels of branch prediction cache | David R. Stiles, John G. Favor | 2002-07-23 |
| 6418524 | Method and apparatus for dependent segmentation and paging processing | Paul Campbell | 2002-07-09 |
| 6397379 | Recording in a program execution profile references to a memory-mapped active device | John S. Yates, Jr., David L. Reese | 2002-05-28 |
| 6360318 | Configurable branch prediction for a processor performing speculative execution | David L. Puziol, Larry Widigen, Len Shar, Walstein Bennett Smith, III | 2002-03-19 |
| 6324635 | Method and apparatus for address paging emulation | Paul Campbell | 2001-11-27 |
| 6321314 | Method and apparatus for restricting memory access | — | 2001-11-20 |
| 6282639 | Configurable branch prediction for a processor performing speculative execution | David L. Puziol, Larry Widigen, Len Shar, Walstein Bennett Smith, III | 2001-08-28 |
| 6212629 | Method and apparatus for executing string instructions | Harold L. McFarland, David R. Stiles, Shrenik Mehta, John G. Favor, Dale R. Greenley +1 more | 2001-04-03 |
| 6195745 | Pipeline throughput via parallel out-of-order execution of adds and moves in a supplemental integer execution unit | Elliot A. Sowadsky, Larry Widigen, David L. Puziol | 2001-02-27 |
| 6108777 | Configurable branch prediction for a processor performing speculative execution | David L. Puziol, Larry Widigen, Len Shar, Walstein Bennett Smith, III | 2000-08-22 |