Issued Patents All Time
Showing 101–117 of 117 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5990488 | Useable drop-in strategy for correct electrical analysis of semiconductor devices | John L. Nistler, Kenneth J. Morrissey | 1999-11-23 |
| 5981368 | Enhanced shallow junction design by polysilicon line width reduction using oxidation with integrated spacer formation | Mark I. Gardner, H. Jim Fulford | 1999-11-09 |
| 5981363 | Method and apparatus for high performance transistor devices | Mark I. Gardner, H. Jim Fulford | 1999-11-09 |
| 5981357 | Semiconductor trench isolation with improved planarization methodology | Fred N. Hause, Robert Dawson, Mark I. Gardner, Kuang-Yeh Chang | 1999-11-09 |
| 5963803 | Method of making N-channel and P-channel IGFETs with different gate thicknesses and spacer widths | Robert Dawson, Mark W. Michael | 1999-10-05 |
| 5949126 | Trench isolation structure employing protective sidewall spacers upon exposed surfaces of the isolation trench | Robert Dawson, Fred N. Hause | 1999-09-07 |
| 5950106 | Method of patterning a metal substrate using spin-on glass as a hard mask | Robert Dawson | 1999-09-07 |
| 5943585 | Trench isolation structure having low K dielectric spacers arranged upon an oxide liner incorporated with nitrogen | Mark I. Gardner, H. Jim Fulford | 1999-08-24 |
| 5915195 | Ion implantation process to improve the gate oxide quality at the edge of a shallow trench isolation structure | H. Jim Fulford | 1999-06-22 |
| 5913106 | Method for testing junction leakage of salicided devices fabricated using shallow trench and refill techniques | Frederick N. Hause, Robert Dawson | 1999-06-15 |
| 5912493 | Enhanced oxidation for spacer formation integrated with LDD implantation | Mark I. Gardner, Fred N. Hause | 1999-06-15 |
| 5904539 | Semiconductor trench isolation process resulting in a silicon mesa having enhanced mechanical and electrical properties | Fred N. Hause, Robert Dawson, Mark I. Gardner, Kuang-Yeh Chang | 1999-05-18 |
| 5882983 | Trench isolation structure partially bound between a pair of low K dielectric structures | Mark I. Gardner, H. Jim Fulford | 1999-03-16 |
| 5846862 | Semiconductor device having a vertical active region and method of manufacture thereof | Robert Dawson | 1998-12-08 |
| 5759871 | Structure for testing junction leakage of salicided devices fabricated using shallow trench and refill techniques | Frederick N. Hause, Robert Dawson | 1998-06-02 |
| 5714392 | Rapid thermal anneal system and method including improved temperature sensing and monitoring | Robert Dawson, Frederick N. Hause | 1998-02-03 |
| 4218280 | Method of cross-linking polyvinyl alcohol and other water soluble resins | Warren H. Philipp, Li-Chen Hsu, Dean W. Sheibley | 1980-08-19 |