Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Cameron Patterson — 26 Patents

AMD: 15 patents #818 of 9,280Top 9%
DCDkr Consulting: 7 patents #1 of 6Top 20%
VPVirginia Tech Intellectual Properties: 2 patents #201 of 1,095Top 20%
Seattle, WA: #901 of 21,776 inventorsTop 5%
Washington: #3,231 of 76,902 inventorsTop 5%
Overall (All Time): #150,017 of 4,157,543Top 4%
26 Patents All Time
Cameron Patterson has been granted 26 US patents while listed as an inventor at AMD. The first was granted in 2001 and the most recent in February 2025. Cameron Patterson ranks #150,017 of 4,157,543 US inventors in our database (top 3.6%). Patent records list Cameron Patterson in Seattle, WA, US.

Issued Patents All Time

Showing 1–25 of 26 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12223539 System and method for e-commerce within social platforms David Robb, Grant Neerings, Joseph Rodriguez, Quinton Richard Harris, Benjamin Cook 2025-02-11
11900446 System and method for facilitating social shopping David Robb, Grant Neerings, Joseph Rodriguez, Quinton Richard Harris, Benjamin Cook 2024-02-13
11651421 System and method for facilitating social shopping David Robb, Grant Neerings, Joseph Rodriguez, Quinton Richard Harris, Benjamin Cook 2023-05-16
11488237 System and method for facilitating social shopping David Robb, Grant Neerings, Joseph Rodriguez, Quinton Richard Harris, Benjamin Cook 2022-11-01
11455678 System and method for distributable e-commerce product listings David Robb, Grant Neerings, Joseph Rodriguez, Quinton Richard Harris, Benjamin Cook 2022-09-27
11157995 System and method for generating and distributing embeddable electronic commerce stores David Robb, Grant Neerings, Joseph Rodriguez, Quinton Richard Harris, Benjamin Cook 2021-10-26
10846785 System and method for generating and distributing embeddable buy buttons David Robb, Grant Neerings, Joseph Rodriguez, Quinton Richard Harris, Benjamin Cook 2020-11-24
10395304 System and method for distributing multimedia content David Robb, Grant Neerings, Joseph Rodriguez, Quinton Richard Harris, Benjamin Cook 2019-08-27
9679298 System and method for distributing multimedia content David Robb, Grant Neerings, Joseph Rodriguez, Quinton Richard Harris, Benjamin Cook 2017-06-13
8473754 Hardware-facilitated secure software execution environment Mark T. Jones, Peter M. Athanas, Joshua N. Edmison, Anthony Mahar, Benjamin J. Muzal +2 more 2013-06-25
7902866 Wires on demand: run-time communication synthesis for reconfigurable computing Peter M. Athanas, John K. Bowen, Timothy G. Dunham, Justin D. Rice, Matthew T. Shelburne +2 more 2011-03-08
7669168 Method and apparatus for dynamically connecting modules in a programmable device 2010-02-23 $3,687,000
7406673 Method and system for identifying essential configuration bits Prasanna Sundararajan, Brandon J. Blodget, Scott P. McMillan 2008-07-29 $11,036,000
7343578 Method and system for generating a bitstream view of a design Prasanna Sundararajan, Brandon J. Blodget, Scott P. McMillan 2008-03-11 $13,878,000
7249010 Methods of estimating susceptibility to single event upsets for a design implemented in an FPGA Prasanna Sundararajan, Carl H. Carmichael, Scott P. McMillan, Brandon J. Blodget 2007-07-24 $11,968,000
7143418 Core template package for creating run-time reconfigurable cores 2006-11-28 $3,263,000
7139995 Integration of a run-time parameterizable core with a static circuit design Philip B. James-Roxby, Daniel J. Downs, Russell J. Morgan 2006-11-21 $5,026,000
7124391 Method and apparatus for dynamically connecting modules in a programmable logic device 2006-10-17 $13,661,000
7080226 Field programmable gate array (FPGA) configuration data path for module communication 2006-07-18 $25,327,000
6802026 Parameterizable and reconfigurable debugger core generators Timothy O. Price 2004-10-05 $40,067,000
6725441 Method and apparatus for defining and modifying connections between logic cores implemented on programmable logic devices Eric R. Keller 2004-04-20 $32,854,000
6457164 Hetergeneous method for determining module placement in FPGAs L. James Hwang, Eric F. Dellinger, Sujoy Mitra, Sundararajarao Mohan, Ralph D. Wittig 2002-09-24 $40,993,000
6430732 Method for structured layout in a hardware description language L. James Hwang, Sujoy Mitra 2002-08-06 $14,655,000
6408422 Method for remapping logic modules to resources of a programmable gate array L. James Hwang 2002-06-18 $66,270,000
6243851 Heterogeneous method for determining module placement in FPGAs L. James Hwang, Eric F. Dellinger, Sujoy Mitra, Sundararajarao Mohan, Ralph D. Wittig 2001-06-05 $72,709,000