LH

L. James Hwang

AM AMD: 43 patents #181 of 9,279Top 2%
Overall (All Time): #70,266 of 4,157,543Top 2%
43
Patents All Time

Issued Patents All Time

Showing 25 most recent of 43 patents

Patent #TitleCo-InventorsDate
11645053 Hardware-software design flow with high-level synthesis for heterogeneous and programmable devices Akella Sastry, Vinod K. Kathail, Shail Aditya Gupta, Vidhumouli Hunsigida, Siddharth Rele 2023-05-09
11188312 Hardware-software design flow with high-level synthesis for heterogeneous and programmable devices Akella Sastry, Vinod K. Kathail, Shail Aditya Gupta, Vidhumouli Hunsigida, Siddharth Rele 2021-11-30
10977018 Development environment for heterogeneous devices Michael Gill, Tom Shui, Jorge Ernesto Carrillo, Alfred Huang, Sudipto Chakraborty 2021-04-13
10635769 Hardware and software event tracing for a system-on-chip Samuel A. Skalicky, Vinod K. Kathail 2020-04-28
9880966 Encapsulating metadata of a platform for application-specific tailoring and reuse of the platform in an integrated circuit Vinod K. Kathail, Sundararajarao Mohan, Jorge Ernesto Carrillo, Hua Sun 2018-01-30
9805152 Compilation of system designs Jorge Ernesto Carrillo, Vinod K. Kathail, Sundararajarao Mohan, Hua Sun 2017-10-31
9652570 Automatic implementation of a customized system-on-chip Vinod K. Kathail, Sundararajarao Mohan, Jorge Ernesto Carrillo, Hua Sun, Tom Shui +1 more 2017-05-16
9223921 Compilation of HLL code with hardware accelerated functions Jorge Ernesto Carrillo, Hua Sun, Sundararajarao Mohan, Vinod K. Kathail 2015-12-29
9147024 Hardware and software cosynthesis performance estimation Vinod K. Kathail, Hua Sun, Sundararajarao Mohan, Yogesh Laxmikant Chobe 2015-09-29
8868396 Verification and debugging using heterogeneous simulation models Nabeel Shirazi, Chi Bun Chan, Hem C. Neema, Kumar Deepak 2014-10-21
8775986 Software debugging of synthesized hardware Sundararajarao Mohan 2014-07-08
8762916 Automatic generation of a data transfer network Vinod K. Kathail, Sundararajarao Mohan, Hua Sun 2014-06-24
8024678 Interfacing with a dynamically configurable arithmetic unit Bradley L. Taylor, Arvind Sundararajan, Shay Ping Seng 2011-09-20
7934185 Method of simulating bidirectional signals in a modeling system Jonathan B. Ballagh, Roger B. Milne, Jeffrey D. Stroomer, Nabeel Shirazi 2011-04-26
7895584 Translation of a program in a dynamically-typed language to a program in a hardware description language Haibing Ma, Jeffrey D. Stroomer, Roger B. Milne 2011-02-22
7739092 Fast hardware co-simulation reset using partial bitstreams Jonathan B. Ballagh, Roger B. Milne, Kevin Marc Neilson, Nabeel Shirazi 2010-06-15
7684968 Generation of a high-level simulation model of an electronic system by combining an HDL control function translated to a high-level language and a separate high-level data path function Gabor Szedo, Singh Vinay Jitendra 2010-03-23
7523434 Interfacing with a dynamically configurable arithmetic unit Bradley L. Taylor, Arvind Sundararajan, Shay Ping Seng 2009-04-21
7509614 Method and system for integrating cores in FPGA-based system-on-chip (SoC) Reno L. Sanchez 2009-03-24
7478030 Clock stabilization detection for hardware simulation Jonathan B. Ballagh, Roger B. Milne, Jeffrey D. Stroomer, Nabeel Shirazi 2009-01-13
7437280 Hardware-based co-simulation on a PLD having an embedded processor Jonathan B. Ballagh, Roger B. Milne, Nabeel Shirazi, Jeffrey D. Stroomer 2008-10-14
7433813 Embedding a co-simulated hardware object in an event-driven simulator Jonathan B. Ballagh, Roger B. Milne, Nabeel Shirazi 2008-10-07
7383478 Wireless dynamic boundary-scan topologies for field Jonathan B. Ballagh, Alexander Carreira, Roger B. Milne, Shay Ping Seng, Nabeel Shirazi 2008-06-03
7363600 Method of simulating bidirectional signals in a modeling system Jonathan B. Ballagh, Roger B. Milne, Jeffrey D. Stroomer, Nabeel Shirazi 2008-04-22
7284225 Embedding a hardware object in an application system Jonathan B. Ballagh, Roger B. Milne, Nabeel Shirazi 2007-10-16