| 8600722 |
Method and apparatus for providing program-based hardware co-simulation of a circuit design |
Chi Bun Chan, Nabeel Shirazi, Shay Ping Seng |
2013-12-03 |
| 8352229 |
Reloadable just-in-time compilation simulation engine for high level modeling systems |
Chi Bun Chan, Jingzhao Ou |
2013-01-08 |
| 8145466 |
Clustering of electronic circuit design modules for hardware-based and software-based co-simulation platforms |
Chi Bun Chan, Jingzhao Ou, Shay Ping Seng |
2012-03-27 |
| 8079013 |
Hardware description interface for a high-level modeling system |
Jingzhao Ou |
2011-12-13 |
| 8042079 |
Synchronization for a modeling system |
Arvind Sundararajan, Andrew Dow, Singh Vinay Jitendra |
2011-10-18 |
| 7992111 |
Conversion of a high-level graphical circuit design block to a high-level language program |
Jingzhao Ou, Chi Bun Chan |
2011-08-02 |
| 7895584 |
Translation of a program in a dynamically-typed language to a program in a hardware description language |
L. James Hwang, Jeffrey D. Stroomer, Roger B. Milne |
2011-02-22 |
| 7895026 |
Multi-rate simulation scheduler for synchronous digital circuits in a high level modeling system |
Sean A. Kelly, Stephen A. Neuendorffer |
2011-02-22 |
| 7725869 |
Method and apparatus for modeling multiple instances of an electronic circuit using an imperative programming language description |
Roger B. Milne |
2010-05-25 |
| 7669164 |
Hardware and software implementation of an electronic design in a programmable logic device |
Roger B. Milne |
2010-02-23 |
| 7620942 |
Method and system for parameterization of imperative-language functions intended as hardware generators |
Roger B. Milne |
2009-11-17 |
| 7395521 |
Method and apparatus for translating an imperative programming language description of a circuit into a hardware description |
Roger B. Milne |
2008-07-01 |
| 7203632 |
HDL co-simulation in a high-level modeling system |
Roger B. Milne, L. James Hwang, Jeffrey D. Stroomer, Nabeel Shirazi, Jonathan B. Ballagh |
2007-04-10 |
| 7194705 |
Simulation of integrated circuitry within a high-level modeling system using hardware description language circuit descriptions |
Kumar Deepak, L. James Hwang, Singh Vinay Jitendra, Roger B. Milne, Nabeel Shirazi +2 more |
2007-03-20 |
| 7086030 |
Incremental netlisting |
Jeffrey D. Stroomer, Roger B. Milne, Jonathan B. Ballagh |
2006-08-01 |
| 7003751 |
Specification of the hierarchy, connectivity, and graphical representation of a circuit design |
Jeffrey D. Stroomer, Roger B. Milne, Jonathan B. Ballagh, L. James Hwang, Nabeel Shirazi |
2006-02-21 |
| 6957423 |
Method of inlining a VHDL function call into Verilog |
— |
2005-10-18 |