Issued Patents All Time
Showing 1–25 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10977401 | Preparation of circuit designs for system-on-chip devices and implementation of circuitry using instances of a logical network-on-chip | Jeffrey M. Arnold, Stephen L. Bade, Srinivas Beeravolu, Chukwuweta Chukwudebe, Anindita Patra | 2021-04-13 |
| 10846449 | Conversion of block model-based circuit designs into circuit implementations | Avinash Somalinga Suresh, Daniel E. Michek, Daniel Gibbons | 2020-11-24 |
| 10489541 | Hardware description language specification translator | Anindita Patra | 2019-11-26 |
| 9881117 | Predictive circuit design for integrated circuits | Anindita Patra | 2018-01-30 |
| 9864828 | Hardware acceleration device handoff for using programmable integrated circuits as hardware accelerators | Susheel Puthana, Stephen P. Rozum, Sudipto Chakraborty, David A. Knol, Yong Li +6 more | 2018-01-09 |
| 9183339 | System and method for preparing partially reconfigurable circuit designs | David Robinson, Amit Kasat, Arvind Sundararajan | 2015-11-10 |
| 8868396 | Verification and debugging using heterogeneous simulation models | L. James Hwang, Chi Bun Chan, Hem C. Neema, Kumar Deepak | 2014-10-21 |
| 8812289 | Simulation that transfers port values of a design block via a configuration block of a programmable device | Chi Bun Chan, Jonathan B. Ballagh | 2014-08-19 |
| 8769448 | Circuit design simulation | Arvind Sundararajan, Sean P. Caffee | 2014-07-01 |
| 8769449 | System level circuit design | Adam P. Donlin, Biping Wu, Kyle Corbett, Shay Ping Seng, Amit Kasat +4 more | 2014-07-01 |
| 8650517 | Automatically documenting circuit designs | Arvind Sundararajan, Jingzhao Ou, Chi Bun Chan | 2014-02-11 |
| 8620638 | Method of performing a simulation of a design under test and a circuit for enabling testing of a circuit design | Chi Bun Chan, Jingzhao Ou, Shay Ping Seng | 2013-12-31 |
| 8600722 | Method and apparatus for providing program-based hardware co-simulation of a circuit design | Chi Bun Chan, Shay Ping Seng, Haibing Ma | 2013-12-03 |
| 8417965 | Method and circuit for secure definition and integration of cores | Arvind Sundararajan, Chi Bun Chan | 2013-04-09 |
| 8402442 | Common debugger method and system | Chi Bun Chan, Jingzhao Ou | 2013-03-19 |
| 8265918 | Simulation and emulation of a circuit design | Hem C. Neema, Chi Bun Chan, Kumar Deepak | 2012-09-11 |
| 8224638 | Managing programmable device configuration | Chi Bun Chan, Bradley K. Fross, Shay Ping Seng, Jonathan B. Ballagh | 2012-07-17 |
| 8219958 | Creating evaluation hardware using a high level modeling system | Arvind Sundararajan | 2012-07-10 |
| 8102188 | Method of and system for implementing a circuit in a device having programmable logic | Chi Bun Chan | 2012-01-24 |
| 8015537 | Automated rate realization for circuit designs within high level circuit implementation tools | Arvind Sundararajan | 2011-09-06 |
| 7937259 | Variable clocking in hardware co-simulation | Chi Bun Chan, Bradley L. Taylor | 2011-05-03 |
| 7934185 | Method of simulating bidirectional signals in a modeling system | Jonathan B. Ballagh, Roger B. Milne, Jeffrey D. Stroomer, L. James Hwang | 2011-04-26 |
| 7746099 | Method of and system for implementing a circuit in a device having programmable logic | Chi Bun Chan | 2010-06-29 |
| 7747423 | Systems and methods of co-simulation utilizing multiple PLDs in a boundary scan chain | Jonathan B. Ballagh, Chi Bun Chan | 2010-06-29 |
| 7739092 | Fast hardware co-simulation reset using partial bitstreams | Jonathan B. Ballagh, L. James Hwang, Roger B. Milne, Kevin Marc Neilson | 2010-06-15 |